RT5677_PWR_DIG1
{RT5677_PWR_DIG1 , 0x0000},
SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("ADC1 clock", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("ADC2 clock", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("I2S1", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("I2S2", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("I2S3", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("I2S4", RT5677_PWR_DIG1,
SND_SOC_DAPM_SUPPLY("SLB", RT5677_PWR_DIG1,
SND_SOC_DAPM_DAC("DAC 1", NULL, RT5677_PWR_DIG1,
SND_SOC_DAPM_DAC("DAC 2", NULL, RT5677_PWR_DIG1,
SND_SOC_DAPM_DAC("DAC 3", NULL, RT5677_PWR_DIG1,
case RT5677_PWR_DIG1:
regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000);