RT274_I2S_CTRL1
RT274_I2S_CTRL1, 0xc018, d_len_code << 3 | c_len_code << 14);
RT274_I2S_CTRL1, RT274_I2S_MODE_MASK, RT274_I2S_MODE_M);
RT274_I2S_CTRL1, RT274_I2S_MODE_MASK, RT274_I2S_MODE_S);
snd_soc_component_update_bits(component, RT274_I2S_CTRL1,
snd_soc_component_update_bits(component, RT274_I2S_CTRL1,
snd_soc_component_update_bits(component, RT274_I2S_CTRL1,
snd_soc_component_update_bits(component, RT274_I2S_CTRL1,
RT274_I2S_CTRL1, 0x1000, 0x1000);
RT274_I2S_CTRL1, 0x1000, 0x0);
RT274_I2S_CTRL1, RT274_TDM_EN, RT274_TDM_EN);
RT274_I2S_CTRL1, RT274_TDM_EN, RT274_TDM_DIS);
RT274_I2S_CTRL1, RT274_TDM_CH_NUM, RT274_TDM_4CH);
RT274_I2S_CTRL1, RT274_TDM_CH_NUM, RT274_TDM_2CH);