arch/powerpc/xmon/ppc-opc.c

270

#define CR B24 + 1

arch/powerpc/xmon/ppc-opc.c

7106

{"e_b", BD24(30,0,0), BD24_MASK, PPCVLE, 0, {B24}},

arch/powerpc/xmon/ppc-opc.c

7107

{"e_bl", BD24(30,0,1), BD24_MASK, PPCVLE, 0, {B24}},

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1764

ASPEED_PINCTRL_PIN(B24),

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

2625

{ PIN_CONFIG_POWER_SOURCE, { F24, B24 }, SCU458, BIT_MASK(5)},

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

2626

{ PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)},

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

347

SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

348

SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

350

SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

352

PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

353

FUNC_GROUP_DECL(NRTS4, B24);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

356

B24);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

357

GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

358

GROUP_DECL(NCSI4, E23, E24, E25, C25, C24, B26, B25, B24);

drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c

1078

PIN_GROUP(QSPI1, B24, E26);

drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c

1163

PIN_GROUP(UART10, A24, B24);

drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c

460

PIN(B24),

drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c

754

[B26] = 57, [A25] = 58, [A24] = 59, [B24] = 60, [E26] = 61, [A21] = 62, [A19] = 63,