drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2822

WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_ENABLE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2875

WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_SRC, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4006

WREG32_FIELD(RLC_PG_CNTL, SMU_CLK_SLOWDOWN_ON_PU_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4012

WREG32_FIELD(RLC_PG_CNTL, SMU_CLK_SLOWDOWN_ON_PD_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4017

WREG32_FIELD(RLC_PG_CNTL, CP_PG_DISABLE, enable ? 0 : 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5324

WREG32_FIELD(RLC_PG_CNTL, STATIC_PER_CU_PG_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5330

WREG32_FIELD(RLC_PG_CNTL, DYN_PER_CU_PG_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5336

WREG32_FIELD(RLC_PG_CNTL, QUICK_PG_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5342

WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5348

WREG32_FIELD(RLC_PG_CNTL, GFX_PIPELINE_PG_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3004

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3018

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3032

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3045

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3058

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3075

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3088

data = REG_SET_FIELD(data, RLC_PG_CNTL,

drivers/gpu/drm/radeon/cik.c

6357

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6363

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6371

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6377

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6384

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6390

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6397

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6403

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6500

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6503

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6510

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6513

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6585

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6591

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6599

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6605

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6632

orig = data = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/cik.c

6635

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/si.c

5243

tmp = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/si.c

5245

WREG32(RLC_PG_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

5265

tmp = RREG32(RLC_PG_CNTL);

drivers/gpu/drm/radeon/si.c

5267

WREG32(RLC_PG_CNTL, tmp);