drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

352

(*dump)[i++][1] = RREG32_SOC15_IP(GC, addr); \

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

338

(*dump)[i++][1] = RREG32_SOC15_IP(GC, addr); \

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

965

reg_val = RREG32_SOC15_IP(GC, SOC15_REG_OFFSET(GC, GET_INST(GC, inst),

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

1021

RREG32_SOC15_IP(GC, reg) :

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

1022

RREG32_SOC15_IP(MMHUB, reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5433

tmp = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9067

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9073

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9120

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9126

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9234

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9248

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9280

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9294

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9325

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9424

tmp = RREG32_SOC15_IP(GC, target);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9434

tmp = RREG32_SOC15_IP(GC, target);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2231

tmp = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6339

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6347

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6396

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6404

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6515

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6529

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6561

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6575

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6606

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6716

tmp = RREG32_SOC15_IP(GC, target);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6726

tmp = RREG32_SOC15_IP(GC, target);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1890

tmp = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4711

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4719

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4762

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4770

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4881

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4895

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4927

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4941

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4972

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6006

mec_int_cntl = RREG32_SOC15_IP(GC,mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6012

mec_int_cntl = RREG32_SOC15_IP(GC, mec_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6067

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6103

cp_int_cntl = RREG32_SOC15_IP(GC, cp_int_cntl_reg);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

55

tmp = RREG32_SOC15_IP(MMHUB, reg);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

83

tmp = RREG32_SOC15_IP(MMHUB, reg);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

495

tmp = RREG32_SOC15_IP(MMHUB, reg);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

523

tmp = RREG32_SOC15_IP(MMHUB, reg);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

355

wptr = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

357

wptr |= RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

569

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

572

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

706

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

733

wptr_poll_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i,

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

767

doorbell = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

768

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i,

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

825

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

419

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

422

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

555

rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

583

wptr_poll_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i,

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

613

doorbell = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

614

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

648

temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

654

temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

672

ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

401

rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

404

ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

467

f32_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

499

rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

552

doorbell = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

553

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

577

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

584

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

590

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

600

temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

610

ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

769

tmp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_FREEZE));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

772

tmp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

880

m->sdmax_rlcx_ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, 0,

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

404

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

407

ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

459

mcu_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

490

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

547

doorbell = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

548

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

572

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

579

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

585

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

594

temp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

604

ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

718

tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

727

tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_IC_OP_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

733

ic_op_cntl = RREG32_SOC15_IP(GC,

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

735

sdma_status = RREG32_SOC15_IP(GC,

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

764

tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

899

m->sdmax_rlcx_ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, 0,

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

374

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

377

ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

441

mcu_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_MCU_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

472

rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_RB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

529

doorbell = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_DOORBELL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

530

doorbell_offset = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_DOORBELL_OFFSET));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

554

temp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_WATCHDOG_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

561

temp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_UTCL1_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

567

temp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_UTCL1_PAGE));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

576

temp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_MCU_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

586

ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_QUEUE0_IB_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

707

tmp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_IC_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

716

tmp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_IC_OP_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

722

ic_op_cntl = RREG32_SOC15_IP(GC,

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

724

sdma_status = RREG32_SOC15_IP(GC,

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

755

tmp = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, i, regSDMA0_SDMA_MCU_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

892

m->sdmax_rlcx_ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_1_get_reg_offset(adev, 0,

drivers/gpu/drm/amd/amdgpu/soc15.c

487

RREG32_SOC15_IP(GC, reg) : RREG32(reg);