drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8506

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8511

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8516

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8525

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8530

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8535

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5313

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5318

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5327

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5332

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5338

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2794

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGTT_MGCG_OVERRIDE));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2799

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGCG_CGLS_CTRL));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2808

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_MEM_SLP_CNTL));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2813

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCP_MEM_SLP_CNTL));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1827

data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL));

drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c

2261

tmp = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_ALWAYS_ON_WGP_MASK));