drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1806

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

866

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

873

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

876

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

894

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

897

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

902

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

905

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

951

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, RK3568_VP_DSP_CTRL__STANDBY);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1001

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1008

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1287

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1294

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1301

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1309

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

707

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

714

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

721

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

994

.en_reg = RK3568_VP_DSP_CTRL,