drivers/gpu/drm/i915/gt/selftest_engine_cs.c

51

return RING_TIMESTAMP(engine->mmio_base);

drivers/gpu/drm/i915/gt/selftest_engine_pm.c

102

cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4016);

drivers/gpu/drm/i915/gt/selftest_engine_pm.c

96

cs = emit_srm(cs, RING_TIMESTAMP(engine->mmio_base), offset + 4000);

drivers/gpu/drm/i915/gt/selftest_execlists.c

1091

*cs++ = i915_mmio_reg_offset(RING_TIMESTAMP(rq->engine->mmio_base));

drivers/gpu/drm/i915/gt/selftest_gt_pm.c

44

ENGINE_READ_FW(engine, RING_TIMESTAMP);

drivers/gpu/drm/i915/gt/selftest_gt_pm.c

49

return ENGINE_READ_FW(engine, RING_TIMESTAMP);

drivers/gpu/drm/i915/gvt/handlers.c

1985

offset == i915_mmio_reg_offset(RING_TIMESTAMP(engine->mmio_base)) ||

drivers/gpu/drm/i915/gvt/handlers.c

2264

MMIO_RING_DFH(RING_TIMESTAMP, D_ALL, F_CMD_ACCESS,

drivers/gpu/drm/i915/i915_cmd_parser.c

620

REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

632

REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

648

REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

678

REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

679

REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

681

REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

685

REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

686

REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),

drivers/gpu/drm/i915/i915_cmd_parser.c

688

REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),

drivers/gpu/drm/i915/i915_ioctl.c

32

.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),

drivers/gpu/drm/i915/i915_perf.c

2028

*cs++ = i915_mmio_reg_offset(RING_TIMESTAMP(base));

drivers/gpu/drm/i915/i915_perf.c

2046

*cs++ = i915_mmio_reg_offset(RING_TIMESTAMP(base));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

113

MMIO_RING_D(RING_TIMESTAMP);

drivers/gpu/drm/i915/selftests/i915_request.c

1962

*cs++ = i915_mmio_reg_offset(RING_TIMESTAMP((ce->engine->mmio_base)));

drivers/gpu/drm/i915/selftests/i915_request.c

2065

cycles = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP);

drivers/gpu/drm/i915/selftests/i915_request.c

2135

elapsed[i] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP);

drivers/gpu/drm/i915/selftests/i915_request.c

2210

elapsed[i - 1] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP);

drivers/gpu/drm/i915/selftests/i915_request.c

2524

elapsed[i - 1] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP);

drivers/gpu/drm/i915/selftests/i915_request.c

2625

elapsed[i - 1] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP);

drivers/gpu/drm/xe/xe_hw_engine.c

1066

return xe_mmio_read64_2x32(&hwe->gt->mmio, RING_TIMESTAMP(hwe->mmio_base));

drivers/gpu/drm/xe/xe_query.c

99

lower_reg = RING_TIMESTAMP(hwe->mmio_base);