RGA3_FIRST_CMD_REG
reg = RGA3_OVLP_TOP_CTRL - RGA3_FIRST_CMD_REG;
reg = RGA3_OVLP_BOT_CTRL - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_Y_BASE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_U_BASE - RGA3_FIRST_CMD_REG;
reg = RGA3_WR_Y_BASE - RGA3_FIRST_CMD_REG;
reg = RGA3_WR_U_BASE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_RD_CTRL - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_VIR_STRIDE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_UV_VIR_STRIDE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_ACT_SIZE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_SRC_SIZE - RGA3_FIRST_CMD_REG;
reg = RGA3_WR_CTRL - RGA3_FIRST_CMD_REG;
reg = RGA3_WR_VIR_STRIDE - RGA3_FIRST_CMD_REG;
reg = RGA3_WR_PL_VIR_STRIDE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_DST_SIZE - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_RD_CTRL - RGA3_FIRST_CMD_REG;
reg = RGA3_WIN0_SCL_FAC - RGA3_FIRST_CMD_REG;
reg = RGA3_OVLP_TOP_ALPHA - RGA3_FIRST_CMD_REG;
reg = RGA3_OVLP_BOT_ALPHA - RGA3_FIRST_CMD_REG;