RK3588_PMU1CRU_RESET_OFFSET
RK3588_PMU1CRU_RESET_OFFSET(SRST_H_PMU1_BIU, 0, 10),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1_BIU, 0, 11),
RK3588_PMU1CRU_RESET_OFFSET(SRST_H_PMU_CM0_BIU, 0, 12),
RK3588_PMU1CRU_RESET_OFFSET(SRST_F_PMU_CM0_CORE, 0, 13),
RK3588_PMU1CRU_RESET_OFFSET(SRST_T_PMU1_CM0_JTAG, 0, 14),
RK3588_PMU1CRU_RESET_OFFSET(SRST_DDR_FAIL_SAFE, 1, 1),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_CRU_PMU1, 1, 2),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1_GRF, 1, 4),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1_IOC, 1, 5),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1WDT, 1, 6),
RK3588_PMU1CRU_RESET_OFFSET(SRST_T_PMU1WDT, 1, 7),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1TIMER, 1, 8),
RK3588_PMU1CRU_RESET_OFFSET(SRST_PMU1TIMER0, 1, 10),
RK3588_PMU1CRU_RESET_OFFSET(SRST_PMU1TIMER1, 1, 11),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU1PWM, 1, 12),
RK3588_PMU1CRU_RESET_OFFSET(SRST_PMU1PWM, 1, 13),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_I2C0, 2, 1),
RK3588_PMU1CRU_RESET_OFFSET(SRST_I2C0, 2, 2),
RK3588_PMU1CRU_RESET_OFFSET(SRST_S_UART0, 2, 5),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_UART0, 2, 6),
RK3588_PMU1CRU_RESET_OFFSET(SRST_H_I2S1_8CH, 2, 7),
RK3588_PMU1CRU_RESET_OFFSET(SRST_M_I2S1_8CH_TX, 2, 10),
RK3588_PMU1CRU_RESET_OFFSET(SRST_M_I2S1_8CH_RX, 2, 13),
RK3588_PMU1CRU_RESET_OFFSET(SRST_H_PDM0, 2, 14),
RK3588_PMU1CRU_RESET_OFFSET(SRST_PDM0, 2, 15),
RK3588_PMU1CRU_RESET_OFFSET(SRST_H_VAD, 3, 0),
RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_INIT, 3, 11),
RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_CMN, 3, 12),
RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX0_LANE, 3, 13),
RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX1_INIT, 3, 15),
RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX1_CMN, 4, 0),
RK3588_PMU1CRU_RESET_OFFSET(SRST_HDPTX1_LANE, 4, 1),
RK3588_PMU1CRU_RESET_OFFSET(SRST_M_MIPI_DCPHY0, 4, 3),
RK3588_PMU1CRU_RESET_OFFSET(SRST_S_MIPI_DCPHY0, 4, 4),
RK3588_PMU1CRU_RESET_OFFSET(SRST_M_MIPI_DCPHY1, 4, 5),
RK3588_PMU1CRU_RESET_OFFSET(SRST_S_MIPI_DCPHY1, 4, 6),
RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U3_0, 4, 7),
RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U3_1, 4, 8),
RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U2_0, 4, 9),
RK3588_PMU1CRU_RESET_OFFSET(SRST_OTGPHY_U2_1, 4, 10),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU0GRF, 5, 3),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU0IOC, 5, 4),
RK3588_PMU1CRU_RESET_OFFSET(SRST_P_GPIO0, 5, 5),
RK3588_PMU1CRU_RESET_OFFSET(SRST_GPIO0, 5, 6),