drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

951

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, RK3568_VP_DSP_CTRL__STANDBY);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1004

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1011

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1290

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1297

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1304

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1312

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

710

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

717

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

724

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

997

.en_mask = RK3568_VP_DSP_CTRL__STANDBY,