drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1790

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

866

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

873

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

876

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

894

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

897

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

902

u32 dsp_ctrl = vop2_vp_read(vp, RK3568_VP_DSP_CTRL);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

905

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, dsp_ctrl);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

951

vop2_vp_write(vp, RK3568_VP_DSP_CTRL, RK3568_VP_DSP_CTRL__STANDBY);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1002

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1009

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1288

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1295

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1302

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1310

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

708

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

715

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

722

.en_reg = RK3568_VP_DSP_CTRL,

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

995

.en_reg = RK3568_VP_DSP_CTRL,