Symbol: RK3562_SUBDDR_CRU_BASE
drivers/clk/rockchip/clk.h
321
#define RK3562_SUBDDR_PLL_CON(x) ((x) * 0x4 + RK3562_SUBDDR_CRU_BASE + 0x20)
drivers/clk/rockchip/clk.h
324
#define RK3562_SUBDDR_MODE_CON (RK3562_SUBDDR_CRU_BASE + 0x380)
drivers/clk/rockchip/clk.h
331
#define RK3562_SUBDDR_CLKSEL_CON(x) ((x) * 0x4 + RK3562_SUBDDR_CRU_BASE + 0x100)
drivers/clk/rockchip/clk.h
332
#define RK3562_SUBDDR_CLKGATE_CON(x) ((x) * 0x4 + RK3562_SUBDDR_CRU_BASE + 0x180)
drivers/clk/rockchip/clk.h
333
#define RK3562_SUBDDR_SOFTRST_CON(x) ((x) * 0x4 + RK3562_SUBDDR_CRU_BASE + 0x200)