RK3562_CRU_RESET_OFFSET
RK3562_CRU_RESET_OFFSET(SRST_P_CSIPHY0, 12, 4),
RK3562_CRU_RESET_OFFSET(SRST_P_CSIPHY1, 12, 5),
RK3562_CRU_RESET_OFFSET(SRST_A_VO_BIU, 13, 3),
RK3562_CRU_RESET_OFFSET(SRST_H_VO_BIU, 13, 4),
RK3562_CRU_RESET_OFFSET(SRST_A_VOP, 13, 6),
RK3562_CRU_RESET_OFFSET(SRST_H_VOP, 13, 7),
RK3562_CRU_RESET_OFFSET(SRST_D_VOP, 13, 8),
RK3562_CRU_RESET_OFFSET(SRST_D_VOP1, 13, 9),
RK3562_CRU_RESET_OFFSET(SRST_A_RGA_BIU, 14, 3),
RK3562_CRU_RESET_OFFSET(SRST_H_RGA_BIU, 14, 4),
RK3562_CRU_RESET_OFFSET(SRST_A_RGA, 14, 6),
RK3562_CRU_RESET_OFFSET(SRST_H_RGA, 14, 7),
RK3562_CRU_RESET_OFFSET(SRST_RGA_CORE, 14, 8),
RK3562_CRU_RESET_OFFSET(SRST_A_JDEC, 14, 9),
RK3562_CRU_RESET_OFFSET(SRST_H_JDEC, 14, 10),
RK3562_CRU_RESET_OFFSET(SRST_B_EBK_BIU, 15, 2),
RK3562_CRU_RESET_OFFSET(SRST_P_EBK_BIU, 15, 3),
RK3562_CRU_RESET_OFFSET(SRST_AHB2AXI_EBC, 15, 4),
RK3562_CRU_RESET_OFFSET(SRST_H_EBC, 15, 5),
RK3562_CRU_RESET_OFFSET(SRST_D_EBC, 15, 6),
RK3562_CRU_RESET_OFFSET(SRST_H_EINK, 15, 7),
RK3562_CRU_RESET_OFFSET(SRST_P_EINK, 15, 8),
RK3562_CRU_RESET_OFFSET(SRST_P_PHP_BIU, 16, 2),
RK3562_CRU_RESET_OFFSET(SRST_A_PHP_BIU, 16, 3),
RK3562_CRU_RESET_OFFSET(SRST_P_PCIE20, 16, 7),
RK3562_CRU_RESET_OFFSET(SRST_PCIE20_POWERUP, 16, 8),
RK3562_CRU_RESET_OFFSET(SRST_USB3OTG, 16, 10),
RK3562_CRU_RESET_OFFSET(SRST_PIPEPHY, 17, 3),
RK3562_CRU_RESET_OFFSET(SRST_A_BUS_BIU, 18, 3),
RK3562_CRU_RESET_OFFSET(SRST_H_BUS_BIU, 18, 4),
RK3562_CRU_RESET_OFFSET(SRST_P_BUS_BIU, 18, 5),
RK3562_CRU_RESET_OFFSET(SRST_P_I2C1, 19, 0),
RK3562_CRU_RESET_OFFSET(SRST_P_I2C2, 19, 1),
RK3562_CRU_RESET_OFFSET(SRST_P_I2C3, 19, 2),
RK3562_CRU_RESET_OFFSET(SRST_P_I2C4, 19, 3),
RK3562_CRU_RESET_OFFSET(SRST_P_I2C5, 19, 4),
RK3562_CRU_RESET_OFFSET(SRST_I2C1, 19, 6),
RK3562_CRU_RESET_OFFSET(SRST_I2C2, 19, 7),
RK3562_CRU_RESET_OFFSET(SRST_I2C3, 19, 8),
RK3562_CRU_RESET_OFFSET(SRST_I2C4, 19, 9),
RK3562_CRU_RESET_OFFSET(SRST_I2C5, 19, 10),
RK3562_CRU_RESET_OFFSET(SRST_BUS_GPIO3, 20, 5),
RK3562_CRU_RESET_OFFSET(SRST_BUS_GPIO4, 20, 6),
RK3562_CRU_RESET_OFFSET(SRST_P_TIMER, 21, 0),
RK3562_CRU_RESET_OFFSET(SRST_TIMER0, 21, 1),
RK3562_CRU_RESET_OFFSET(SRST_TIMER1, 21, 2),
RK3562_CRU_RESET_OFFSET(SRST_TIMER2, 21, 3),
RK3562_CRU_RESET_OFFSET(SRST_TIMER3, 21, 4),
RK3562_CRU_RESET_OFFSET(SRST_TIMER4, 21, 5),
RK3562_CRU_RESET_OFFSET(SRST_TIMER5, 21, 6),
RK3562_CRU_RESET_OFFSET(SRST_P_STIMER, 21, 7),
RK3562_CRU_RESET_OFFSET(SRST_STIMER0, 21, 8),
RK3562_CRU_RESET_OFFSET(SRST_STIMER1, 21, 9),
RK3562_CRU_RESET_OFFSET(SRST_P_WDTNS, 22, 0),
RK3562_CRU_RESET_OFFSET(SRST_WDTNS, 22, 1),
RK3562_CRU_RESET_OFFSET(SRST_P_GRF, 22, 2),
RK3562_CRU_RESET_OFFSET(SRST_P_SGRF, 22, 3),
RK3562_CRU_RESET_OFFSET(SRST_P_MAILBOX, 22, 4),
RK3562_CRU_RESET_OFFSET(SRST_P_INTC, 22, 5),
RK3562_CRU_RESET_OFFSET(SRST_A_BUS_GIC400, 22, 6),
RK3562_CRU_RESET_OFFSET(SRST_A_BUS_GIC400_DEBUG, 22, 7),
RK3562_CRU_RESET_OFFSET(SRST_A_BUS_SPINLOCK, 23, 0),
RK3562_CRU_RESET_OFFSET(SRST_A_DCF, 23, 1),
RK3562_CRU_RESET_OFFSET(SRST_P_DCF, 23, 2),
RK3562_CRU_RESET_OFFSET(SRST_F_BUS_CM0_CORE, 23, 3),
RK3562_CRU_RESET_OFFSET(SRST_T_BUS_CM0_JTAG, 23, 5),
RK3562_CRU_RESET_OFFSET(SRST_H_ICACHE, 23, 8),
RK3562_CRU_RESET_OFFSET(SRST_H_DCACHE, 23, 9),
RK3562_CRU_RESET_OFFSET(SRST_P_TSADC, 24, 0),
RK3562_CRU_RESET_OFFSET(SRST_TSADC, 24, 1),
RK3562_CRU_RESET_OFFSET(SRST_TSADCPHY, 24, 2),
RK3562_CRU_RESET_OFFSET(SRST_P_DFT2APB, 24, 4),
RK3562_CRU_RESET_OFFSET(SRST_A_GMAC, 25, 0),
RK3562_CRU_RESET_OFFSET(SRST_P_APB2ASB_VCCIO156, 25, 1),
RK3562_CRU_RESET_OFFSET(SRST_P_DSIPHY, 25, 5),
RK3562_CRU_RESET_OFFSET(SRST_P_DSITX, 25, 8),
RK3562_CRU_RESET_OFFSET(SRST_P_CPU_EMA_DET, 25, 9),
RK3562_CRU_RESET_OFFSET(SRST_P_HASH, 25, 10),
RK3562_CRU_RESET_OFFSET(SRST_P_TOPCRU, 25, 11),
RK3562_CRU_RESET_OFFSET(SRST_P_ASB2APB_VCCIO156, 26, 0),
RK3562_CRU_RESET_OFFSET(SRST_P_IOC_VCCIO156, 26, 1),
RK3562_CRU_RESET_OFFSET(SRST_P_GPIO3_VCCIO156, 26, 2),
RK3562_CRU_RESET_OFFSET(SRST_P_GPIO4_VCCIO156, 26, 3),
RK3562_CRU_RESET_OFFSET(SRST_P_SARADC_VCCIO156, 26, 4),
RK3562_CRU_RESET_OFFSET(SRST_SARADC_VCCIO156, 26, 5),
RK3562_CRU_RESET_OFFSET(SRST_SARADC_VCCIO156_PHY, 26, 6),
RK3562_CRU_RESET_OFFSET(SRST_A_MAC100, 27, 1),
RK3562_CRU_RESET_OFFSET(SRST_A_TOP_BIU, 1, 0),
RK3562_CRU_RESET_OFFSET(SRST_A_TOP_VIO_BIU, 1, 1),
RK3562_CRU_RESET_OFFSET(SRST_REF_PVTPLL_LOGIC, 1, 2),
RK3562_CRU_RESET_OFFSET(SRST_NCOREPORESET0, 3, 0),
RK3562_CRU_RESET_OFFSET(SRST_NCOREPORESET1, 3, 1),
RK3562_CRU_RESET_OFFSET(SRST_NCOREPORESET2, 3, 2),
RK3562_CRU_RESET_OFFSET(SRST_NCOREPORESET3, 3, 3),
RK3562_CRU_RESET_OFFSET(SRST_NCORESET0, 3, 4),
RK3562_CRU_RESET_OFFSET(SRST_NCORESET1, 3, 5),
RK3562_CRU_RESET_OFFSET(SRST_NCORESET2, 3, 6),
RK3562_CRU_RESET_OFFSET(SRST_NCORESET3, 3, 7),
RK3562_CRU_RESET_OFFSET(SRST_NL2RESET, 3, 8),
RK3562_CRU_RESET_OFFSET(SRST_DAP, 4, 9),
RK3562_CRU_RESET_OFFSET(SRST_P_DBG_DAPLITE, 4, 10),
RK3562_CRU_RESET_OFFSET(SRST_REF_PVTPLL_CORE, 4, 13),
RK3562_CRU_RESET_OFFSET(SRST_A_CORE_BIU, 5, 0),
RK3562_CRU_RESET_OFFSET(SRST_P_CORE_BIU, 5, 1),
RK3562_CRU_RESET_OFFSET(SRST_H_CORE_BIU, 5, 2),
RK3562_CRU_RESET_OFFSET(SRST_A_NPU_BIU, 6, 2),
RK3562_CRU_RESET_OFFSET(SRST_H_NPU_BIU, 6, 3),
RK3562_CRU_RESET_OFFSET(SRST_A_RKNN, 6, 4),
RK3562_CRU_RESET_OFFSET(SRST_H_RKNN, 6, 5),
RK3562_CRU_RESET_OFFSET(SRST_REF_PVTPLL_NPU, 6, 6),
RK3562_CRU_RESET_OFFSET(SRST_A_GPU_BIU, 8, 3),
RK3562_CRU_RESET_OFFSET(SRST_GPU, 8, 4),
RK3562_CRU_RESET_OFFSET(SRST_REF_PVTPLL_GPU, 8, 5),
RK3562_CRU_RESET_OFFSET(SRST_GPU_BRG_BIU, 8, 8),
RK3562_CRU_RESET_OFFSET(SRST_RKVENC_CORE, 9, 0),
RK3562_CRU_RESET_OFFSET(SRST_A_VEPU_BIU, 9, 3),
RK3562_CRU_RESET_OFFSET(SRST_H_VEPU_BIU, 9, 4),
RK3562_CRU_RESET_OFFSET(SRST_A_RKVENC, 9, 5),
RK3562_CRU_RESET_OFFSET(SRST_H_RKVENC, 9, 6),
RK3562_CRU_RESET_OFFSET(SRST_RKVDEC_HEVC_CA, 10, 2),
RK3562_CRU_RESET_OFFSET(SRST_A_VDPU_BIU, 10, 5),
RK3562_CRU_RESET_OFFSET(SRST_H_VDPU_BIU, 10, 6),
RK3562_CRU_RESET_OFFSET(SRST_A_RKVDEC, 10, 7),
RK3562_CRU_RESET_OFFSET(SRST_H_RKVDEC, 10, 8),
RK3562_CRU_RESET_OFFSET(SRST_A_VI_BIU, 11, 3),
RK3562_CRU_RESET_OFFSET(SRST_H_VI_BIU, 11, 4),
RK3562_CRU_RESET_OFFSET(SRST_P_VI_BIU, 11, 5),
RK3562_CRU_RESET_OFFSET(SRST_ISP, 11, 8),
RK3562_CRU_RESET_OFFSET(SRST_A_VICAP, 11, 9),
RK3562_CRU_RESET_OFFSET(SRST_H_VICAP, 11, 10),
RK3562_CRU_RESET_OFFSET(SRST_D_VICAP, 11, 11),
RK3562_CRU_RESET_OFFSET(SRST_I0_VICAP, 11, 12),
RK3562_CRU_RESET_OFFSET(SRST_I1_VICAP, 11, 13),
RK3562_CRU_RESET_OFFSET(SRST_I2_VICAP, 11, 14),
RK3562_CRU_RESET_OFFSET(SRST_I3_VICAP, 11, 15),
RK3562_CRU_RESET_OFFSET(SRST_P_CSIHOST0, 12, 0),
RK3562_CRU_RESET_OFFSET(SRST_P_CSIHOST1, 12, 1),
RK3562_CRU_RESET_OFFSET(SRST_P_CSIHOST2, 12, 2),
RK3562_CRU_RESET_OFFSET(SRST_P_CSIHOST3, 12, 3),