B1
rq[B1] = create_rewinder(ce, rq[A1], slot, Z);
err = wait_for_submit(engine, rq[B1], HZ / 2);
GEM_BUG_ON(!i915_request_is_active(rq[B1]));
[0x5] = { COMMON_STEP(B1) },
[2] = { COMMON_STEP(B1) },
func(B1) \
SUBPLATFORM_CASE(DG2, G11, B1),
[0x5] = { COMMON_STEP(B1) },
func(B1) \
calib->B1 = be16_to_cpu(data->bmp180_cal_buf[B1]);
x2 = (calib->B1 * ((b6 * b6) >> 12)) >> 16;
s16 B1;
u16 B1, u16 B2, u16 B3, u16 B4,
adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
adv7511_wr(sd, 0x21, B1);
sdp_io_write_and_or(sd, 0xe8, 0xe0, c->B1 >> 8);
sdp_io_write(sd, 0xe9, c->B1);
IWL_MLD_ENC_EHT_RU(2_1_1, B1);
IWL_MVM_ENC_EHT_RU(2_1_1, B1);
CASE_BTC_SLOT_STR(B1);
SIG_EXPR_LIST_DECL_SINGLE(B1, SCL4, I2C4, I2C4_DESC);
PIN_DECL_1(B1, GPIOQ2, SCL4);
FUNC_GROUP_DECL(I2C4, B1, F5);
ASPEED_PINCTRL_PIN(B1),
SIG_EXPR_LIST_DECL_SINGLE(B1, GPIOT7, GPIOT7, SIG_DESC_SET(SCUA0, 7));
SIG_EXPR_LIST_DECL_SINGLE(B1, RMII2TXEN, RMII2, RMII2_DESC);
SIG_EXPR_LIST_DECL_SINGLE(B1, RGMII2TXCTL, RGMII2);
PIN_DECL_(B1, SIG_EXPR_LIST_PTR(B1, GPIOT7), SIG_EXPR_LIST_PTR(B1, RMII2TXEN),
SIG_EXPR_LIST_PTR(B1, RGMII2TXCTL));
FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
FUNC_GROUP_DECL(RMII2, B2, B1, A2, B3, C2, C3, D1, D2, E6);
ASPEED_PINCTRL_PIN(B1),
ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B1, B3, SCU90, 11),
SIG_EXPR_LIST_DECL_SESG(B1, RGMII1RXD1, RGMII1, SIG_DESC_SET(SCU400, 9),
SIG_EXPR_LIST_DECL_SESG(B1, RMII1RXD1, RMII1, SIG_DESC_SET(SCU400, 9),
PIN_DECL_2(B1, GPIO18B1, RGMII1RXD1, RMII1RXD1);
FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
ASPEED_PINCTRL_PIN(B1),
PIC32_PINCTRL_GROUP(17, B1,
u32 B1;
u16 B1;