B0_R1_CSR
skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P);
queue->rx_bmu_ctl = (HW_PTR) ADDR(B0_R1_CSR) ;
outpd(ADDR(B0_R1_CSR),CSR_SET_RESET) ;
outpd(ADDR(B0_R1_CSR),CSR_CLR_RESET) ;
outpd(ADDR(B0_R1_CSR),CSR_START) ;
outpd(ADDR(B0_R1_CSR),CSR_START) ;