arch/riscv/errata/mips/errata.c

46

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)

arch/riscv/errata/sifive/errata.c

88

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)

arch/riscv/errata/thead/errata.c

118

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)

arch/riscv/errata/thead/errata.c

140

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)

arch/riscv/errata/thead/errata.c

163

if (stage != RISCV_ALTERNATIVES_EARLY_BOOT)

arch/riscv/errata/thead/errata.c

212

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) {

arch/riscv/errata/thead/errata.c

222

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)

arch/riscv/errata/thead/errata.c

36

if (stage != RISCV_ALTERNATIVES_EARLY_BOOT &&

arch/riscv/kernel/alternative.c

230

RISCV_ALTERNATIVES_EARLY_BOOT);

arch/riscv/kernel/cpufeature.c

1230

if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)