drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

182

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

209

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

212

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

433

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

480

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

641

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

591

REG_WAIT(OTG_PIXEL_RATE_CNTL[params->otg_inst],

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

227

REG_WAIT(OTG_PIXEL_RATE_CNTL[params->otg_inst],

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

226

REG_WAIT(OTG_PIXEL_RATE_CNTL[params->otg_inst],

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1243

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1526

REG_WAIT(OTG_PIXEL_RATE_CNTL[params->otg_inst],

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2640

REG_WAIT(OTG_PIXEL_RATE_CNTL[params->otg_inst],

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

117

REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c

263

REG_WAIT(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_FREQ_RAMP_DONE, 1, 50, 2000);

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

107

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

135

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

207

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

67

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

81

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

146

REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 1,

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

157

REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

221

REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

356

REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 1,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

116

REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

140

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

234

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

311

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

342

REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

364

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

377

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

414

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

432

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

492

REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

505

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

515

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

533

REG_WAIT(DMU_MEM_PWR_CNTL, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

561

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

672

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

719

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

737

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

778

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

787

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

801

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

810

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

838

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

851

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 1, 10000);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

92

REG_WAIT(DCI_MEM_PWR_STATUS, DMCU_IRAM_MEM_PWR_STATE, 0, 2, 10);

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

949

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

994

REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

331

REG_WAIT(DIO_MEM_PWR_STATUS, I2C_MEM_PWR_STATE, 0, 0, 5);

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

767

REG_WAIT(DMIF_BUFFER_CONTROL,

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

804

REG_WAIT(DMIF_BUFFER_CONTROL,

drivers/gpu/drm/amd/display/dc/dce/dce_opp.c

647

REG_WAIT(FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED, 1, 10, 10);

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.c

249

REG_WAIT(BL_PWM_GRP1_REG_LOCK,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

734

REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

87

REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

951

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS,

drivers/gpu/drm/amd/display/dc/dce/dce_transform.c

239

REG_WAIT(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, 0, 1, 10);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

94

REG_WAIT(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_STATUS, 1, 20, 100);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c

72

REG_WAIT(VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED,

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_apg.c

54

REG_WAIT(APG_CONTROL,

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_apg.c

58

REG_WAIT(APG_CONTROL,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

653

REG_WAIT(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

797

REG_WAIT(DP_SEC_CNTL2, DP_SEC_GSP4_SEND_PENDING,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

80

REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

810

REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

853

REG_WAIT(AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE_PENDING,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

944

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS,

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c

239

REG_WAIT(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT,

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c

516

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

351

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

62

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

299

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

314

REG_WAIT(DIG_FE_CNTL, DIG_SYMCLK_FE_ON, 1, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

323

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 1, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

327

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

406

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

331

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

390

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

326

REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

352

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 1, 10, 5000);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

356

REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, 0, 10, 5000);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

166

REG_WAIT(DSCL_MEM_PWR_STATUS, LUT_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

605

REG_WAIT(CM_MEM_PWR_STATUS, BLNDGAM_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

623

REG_WAIT(CM_MEM_PWR_STATUS2, HDR3DLUT_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

641

REG_WAIT(CM_MEM_PWR_STATUS2, SHAPER_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

138

REG_WAIT(CM_MEM_PWR_STATUS, GAMCOR_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

161

REG_WAIT(DSCL_MEM_PWR_STATUS, LUT_MEM_PWR_STATE, 0, 1, 100);

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

163

REG_WAIT(DSCL_MEM_PWR_STATUS, LUT_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

971

REG_WAIT(ISHARP_DELTA_LUT_MEM_PWR_CTRL,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

276

REG_WAIT(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_DOUBLE_BUFFER_REG_UPDATE_PENDING, 0, 2, 50000);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

193

REG_WAIT(DSCRM_DSC_FORWARD_CONFIG, DSCRM_DSC_FORWARD_EN_STATUS, 0, 2, 50000);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c

52

REG_WAIT(HDMI_FRL_ENC_MEM_CTRL, METERBUFFER_MEM_PWR_STATE, 0, 1, 100);

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

103

REG_WAIT(HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0, FIFO_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

107

REG_WAIT(HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0, FIFO_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c

65

REG_WAIT(HDMI_TB_ENC_CONTROL, HDMI_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c

378

REG_WAIT(DP_DPHY_SYM32_STATUS,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c

434

REG_WAIT(DP_DPHY_SYM32_STATUS,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

107

REG_WAIT(DP_SYM32_ENC_VID_FIFO_CONTROL,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

112

REG_WAIT(DP_SYM32_ENC_VID_FIFO_CONTROL, /* Disable Clock Ramp Adjuster FIFO */

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

121

REG_WAIT(DP_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

126

REG_WAIT(DP_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

153

REG_WAIT(DP_SYM32_ENC_VID_STREAM_CONTROL,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

73

REG_WAIT(DP_SYM32_ENC_CONTROL,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

81

REG_WAIT(DP_SYM32_ENC_CONTROL,

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

107

REG_WAIT(HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0, FIFO_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

111

REG_WAIT(HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0, FIFO_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c

73

REG_WAIT(HDMI_TB_ENC_CONTROL, HDMI_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

50

REG_WAIT(HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0, FIFO_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c

54

REG_WAIT(HDMI_STREAM_ENC_CLOCK_RAMP_ADJUSTER_FIFO_STATUS_CONTROL0, FIFO_RESET_DONE,

drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c

101

REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

118

REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1000, 30);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

121

REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1000, 30);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

124

REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1000, 30);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

127

REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1000, 30);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

141

REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

142

REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

143

REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c

144

REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn32/dcn32_hubbub.c

147

REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn32/dcn32_hubbub.c

148

REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn32/dcn32_hubbub.c

149

REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn32/dcn32_hubbub.c

150

REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

588

REG_WAIT(DCHVM_RIOMMU_STAT0, HOSTVM_PREFETCH_DONE, 1, 5, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

81

REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

82

REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

83

REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c

84

REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1162

REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1163

REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1164

REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1165

REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1, 100);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1181

REG_WAIT(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, hubbub2->det0_size, 1, 100000); /* 1 vupdate at 10hz */

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1184

REG_WAIT(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, hubbub2->det1_size, 1, 100000);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1187

REG_WAIT(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, hubbub2->det2_size, 1, 100000);

drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c

1190

REG_WAIT(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, hubbub2->det3_size, 1, 100000);

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

1356

REG_WAIT(HUBPRET_READ_LINE_STATUS,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

60

REG_WAIT(DCHUBP_CNTL,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

980

REG_WAIT(DCHUBP_CNTL,

drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c

102

REG_WAIT(DCHUBP_CNTL,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1018

REG_WAIT(DOMAIN0_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1026

REG_WAIT(DOMAIN2_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1034

REG_WAIT(DOMAIN4_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1042

REG_WAIT(DOMAIN6_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

957

REG_WAIT(DOMAIN1_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

965

REG_WAIT(DOMAIN3_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

973

REG_WAIT(DOMAIN5_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

981

REG_WAIT(DOMAIN7_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

486

REG_WAIT(DOMAIN16_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

494

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

502

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

510

REG_WAIT(DOMAIN19_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

518

REG_WAIT(DOMAIN20_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

526

REG_WAIT(DOMAIN21_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

557

REG_WAIT(DOMAIN1_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

565

REG_WAIT(DOMAIN3_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

573

REG_WAIT(DOMAIN5_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

581

REG_WAIT(DOMAIN7_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

589

REG_WAIT(DOMAIN9_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

639

REG_WAIT(DOMAIN0_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

647

REG_WAIT(DOMAIN2_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

655

REG_WAIT(DOMAIN4_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

663

REG_WAIT(DOMAIN6_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

671

REG_WAIT(DOMAIN8_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

117

REG_WAIT(DOMAIN0_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

125

REG_WAIT(DOMAIN2_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

133

REG_WAIT(DOMAIN4_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

141

REG_WAIT(DOMAIN6_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

149

REG_WAIT(DOMAIN8_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

180

REG_WAIT(DOMAIN16_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

188

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

196

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

204

REG_WAIT(DOMAIN19_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

212

REG_WAIT(DOMAIN20_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

60

REG_WAIT(DOMAIN1_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

68

REG_WAIT(DOMAIN3_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

76

REG_WAIT(DOMAIN5_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

84

REG_WAIT(DOMAIN7_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

92

REG_WAIT(DOMAIN9_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

308

REG_WAIT(DOMAIN16_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

316

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

324

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

478

REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

482

REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

486

REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

490

REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

252

REG_WAIT(DOMAIN16_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

260

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

268

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

276

REG_WAIT(DOMAIN19_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

573

REG_WAIT(DOMAIN1_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

581

REG_WAIT(DOMAIN3_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

589

REG_WAIT(DOMAIN5_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

597

REG_WAIT(DOMAIN7_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

107

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

115

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

123

REG_WAIT(DOMAIN19_PG_STATUS,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

184

REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

188

REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

192

REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

196

REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

99

REG_WAIT(DOMAIN16_PG_STATUS,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

94

REG_WAIT(MMHUBBUB_WARMUP_CONTROL_STATUS, MMHUBBUB_WARMUP_SW_INT_STATUS, 1, 20, 100);

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c

114

REG_WAIT(MPCC_STATUS[id],

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c

479

REG_WAIT(MPCC_STATUS[id],

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

184

REG_WAIT(MPCC_MEM_PWR_CTRL[mpcc_id], MPCC_OGAM_MEM_PWR_STATE, 0, 10, 10);

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

834

REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU0_SHAPER_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

835

REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU0_3DLUT_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

845

REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU1_SHAPER_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c

846

REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU1_3DLUT_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

696

REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_SHAPER_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

697

REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_3DLUT_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c

79

REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_STATE, 0, 1, 5);

drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c

231

REG_WAIT(MPC_RMCM_MEM_PWR_CTRL[mpcc_id], MPC_RMCM_SHAPER_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c

232

REG_WAIT(MPC_RMCM_MEM_PWR_CTRL[mpcc_id], MPC_RMCM_3DLUT_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c

83

REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_SHAPER_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c

84

REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_3DLUT_MEM_PWR_STATE, 0, 1, max_retries);

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

492

REG_WAIT(OPTC_INPUT_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

500

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

571

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

681

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

839

REG_WAIT(OTG_STATUS,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

845

REG_WAIT(OTG_STATUS,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

279

REG_WAIT(OTG_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

326

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

353

REG_WAIT(OTG_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

394

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

52

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

128

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

347

REG_WAIT(OTG_DOUBLE_BUFFER_CONTROL, OTG_DRR_TIMING_DBUF_UPDATE_PENDING, 0, 2, 100000); /* 1 vupdate at 5hz */

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

58

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

146

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

169

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

146

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

161

REG_WAIT(OTG_CLOCK_CONTROL, OTG_BUSY, 0, 1, 100000);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

129

REG_WAIT(OTG_DOUBLE_BUFFER_CONTROL, OTG_H_TIMING_DIV_MODE_DB_UPDATE_PENDING, 0, 2, 50000);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

196

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

211

REG_WAIT(OTG_CLOCK_CONTROL, OTG_BUSY, 0, 1, 100000);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

163

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

166

REG_WAIT(OTG_CONTROL, OTG_CURRENT_MASTER_EN_STATE, 0, 1, 100000);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

181

REG_WAIT(OTG_CLOCK_CONTROL, OTG_BUSY, 0, 1, 100000);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

540

REG_WAIT(OTG_CLOCK_CONTROL, OTG_CURRENT_MASTER_EN_STATE, 0, 1, 100000);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

230

REG_WAIT(OTG_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

235

REG_WAIT(OTG_CLOCK_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

250

REG_WAIT(OTG_CLOCK_CONTROL, OTG_BUSY, 0, 1, 100000);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

457

REG_WAIT(OTG_MASTER_UPDATE_LOCK,

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

108

REG_WAIT(DOMAIN16_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

116

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

124

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

132

REG_WAIT(DOMAIN19_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

207

REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

212

REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

217

REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

222

REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

281

REG_WAIT(DOMAIN25_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

329

REG_WAIT(DOMAIN22_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

432

REG_WAIT(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

101

REG_WAIT(DOMAIN17_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

109

REG_WAIT(DOMAIN18_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

117

REG_WAIT(DOMAIN19_PG_STATUS,

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

208

REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

213

REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

218

REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

223

REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

290

REG_WAIT(DOMAIN25_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

349

REG_WAIT(DOMAIN22_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

447

REG_WAIT(DOMAIN23_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

495

REG_WAIT(DOMAIN26_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

560

REG_WAIT(DOMAIN24_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);

drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c

93

REG_WAIT(DOMAIN16_PG_STATUS,