REG_UPDATE_5

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c

292

REG_UPDATE_5(DCCG_GATE_DISABLE_CNTL2,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

181

REG_UPDATE_5(DC_I2C_TRANSACTION0,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

189

REG_UPDATE_5(DC_I2C_TRANSACTION1,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

197

REG_UPDATE_5(DC_I2C_TRANSACTION2,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

205

REG_UPDATE_5(DC_I2C_TRANSACTION3,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

349

REG_UPDATE_5(DC_I2C_CONTROL,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

51

REG_UPDATE_5(DC_I2C_CONTROL,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1046

REG_UPDATE_5(HDMI_CONTROL,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1438

REG_UPDATE_5(DP_SEC_CNTL,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

577

REG_UPDATE_5(HDMI_CONTROL,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.c

74

REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.c

98

REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1048

REG_UPDATE_5(HDMI_CONTROL,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1413

REG_UPDATE_5(DP_SEC_CNTL,

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.c

314

REG_UPDATE_5(DP_SEC_CNTL,

drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c

201

REG_UPDATE_5(HDMI_FRL_ENC_CONFIG,

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c

84

REG_UPDATE_5(MPCC_CONTROL[mpcc_id],

drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c

49

REG_UPDATE_5(MPCC_CONTROL[mpcc_id],

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1175

REG_UPDATE_5(OTG_TEST_PATTERN_PARAMETERS,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1185

REG_UPDATE_5(OTG_TEST_PATTERN_PARAMETERS,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1195

REG_UPDATE_5(OTG_TEST_PATTERN_PARAMETERS,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

950

REG_UPDATE_5(OTG_V_TOTAL_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

96

REG_UPDATE_5(OTG_GSL_CONTROL,

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

76

REG_UPDATE_5(OTG_V_TOTAL_CONTROL,