drivers/thermal/tegra/soctherm.c

1765

r = REG_SET_MASK(r, CCROC_THROT_PSKIP_RAMP_DURATION_MASK, 0xff);

drivers/thermal/tegra/soctherm.c

1766

r = REG_SET_MASK(r, CCROC_THROT_PSKIP_RAMP_STEP_MASK, 0xf);

drivers/thermal/tegra/soctherm.c

1770

r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_ENB_MASK, 1);

drivers/thermal/tegra/soctherm.c

1771

r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_DIVIDEND_MASK, dividend);

drivers/thermal/tegra/soctherm.c

1772

r = REG_SET_MASK(r, CCROC_THROT_PSKIP_CTRL_DIVISOR_MASK, 0xff);

drivers/thermal/tegra/soctherm.c

1810

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1);

drivers/thermal/tegra/soctherm.c

1811

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT_CPU_MASK, throt_vect);

drivers/thermal/tegra/soctherm.c

1812

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT2_CPU_MASK, throt_vect);

drivers/thermal/tegra/soctherm.c

1816

r = REG_SET_MASK(0, THROT_PSKIP_RAMP_SEQ_BYPASS_MODE_MASK, 1);

drivers/thermal/tegra/soctherm.c

1843

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1);

drivers/thermal/tegra/soctherm.c

1844

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_DIVIDEND_MASK, dividend);

drivers/thermal/tegra/soctherm.c

1845

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_DIVISOR_MASK, 0xff);

drivers/thermal/tegra/soctherm.c

1849

r = REG_SET_MASK(r, THROT_PSKIP_RAMP_DURATION_MASK, 0xff);

drivers/thermal/tegra/soctherm.c

1850

r = REG_SET_MASK(r, THROT_PSKIP_RAMP_STEP_MASK, 0xf);

drivers/thermal/tegra/soctherm.c

1872

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_ENABLE_MASK, 1);

drivers/thermal/tegra/soctherm.c

1873

r = REG_SET_MASK(r, THROT_PSKIP_CTRL_VECT_GPU_MASK, throt_vect);

drivers/thermal/tegra/soctherm.c

1886

r = REG_SET_MASK(0, OC1_CFG_HW_RESTORE_MASK, 1);

drivers/thermal/tegra/soctherm.c

1887

r = REG_SET_MASK(r, OC1_CFG_THROTTLE_MODE_MASK, oc->mode);

drivers/thermal/tegra/soctherm.c

1888

r = REG_SET_MASK(r, OC1_CFG_ALARM_POLARITY_MASK, oc->active_low);

drivers/thermal/tegra/soctherm.c

1889

r = REG_SET_MASK(r, OC1_CFG_EN_THROTTLE_MASK, 1);

drivers/thermal/tegra/soctherm.c

1927

r = REG_SET_MASK(0, THROT_PRIORITY_LITE_PRIO_MASK, stc.priority);

drivers/thermal/tegra/soctherm.c

1930

r = REG_SET_MASK(0, THROT_DELAY_LITE_DELAY_MASK, 0);

drivers/thermal/tegra/soctherm.c

1937

r = REG_SET_MASK(0, THROT_PRIORITY_LOCK_PRIORITY_MASK,

drivers/thermal/tegra/soctherm.c

1959

v = REG_SET_MASK(0, THROT_GLOBAL_ENB_MASK, 1);

drivers/thermal/tegra/soctherm.c

1964

v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1);

drivers/thermal/tegra/soctherm.c

1970

v = REG_SET_MASK(v, CDIVG_USE_THERM_CONTROLS_MASK, 1);

drivers/thermal/tegra/soctherm.c

2045

pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,

drivers/thermal/tegra/soctherm.c

2050

hotspot = REG_SET_MASK(hotspot,

drivers/thermal/tegra/soctherm.c

495

r = REG_SET_MASK(r, sg->thermtrip_threshold_mask, temp);

drivers/thermal/tegra/soctherm.c

496

r = REG_SET_MASK(r, sg->thermtrip_enable_mask, 1);

drivers/thermal/tegra/soctherm.c

497

r = REG_SET_MASK(r, sg->thermtrip_any_en_mask, 0);

drivers/thermal/tegra/soctherm.c

552

r = REG_SET_MASK(r, sg->thermctl_lvl0_up_thresh_mask, temp);

drivers/thermal/tegra/soctherm.c

553

r = REG_SET_MASK(r, sg->thermctl_lvl0_dn_thresh_mask, temp);

drivers/thermal/tegra/soctherm.c

554

r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt);

drivers/thermal/tegra/soctherm.c

555

r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt);

drivers/thermal/tegra/soctherm.c

556

r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1);

drivers/thermal/tegra/soctherm.c

644

r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, TH_INTR_UP_DN_EN);

drivers/thermal/tegra/soctherm.c

656

r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, 0);

drivers/thermal/tegra/soctherm.c

669

r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 0);

drivers/thermal/tegra/soctherm.c

676

r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_up_thresh_mask, hi);

drivers/thermal/tegra/soctherm.c

677

r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_dn_thresh_mask, lo);

drivers/thermal/tegra/soctherm.c

678

r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1);

drivers/thermal/tegra/soctherm.c

923

r = REG_SET_MASK(r, OC_INTR_OC1_MASK, 1);

drivers/thermal/tegra/soctherm.c

926

r = REG_SET_MASK(r, OC_INTR_OC2_MASK, 1);

drivers/thermal/tegra/soctherm.c

929

r = REG_SET_MASK(r, OC_INTR_OC3_MASK, 1);

drivers/thermal/tegra/soctherm.c

932

r = REG_SET_MASK(r, OC_INTR_OC4_MASK, 1);