RFPGA0_XCD_RFPARAMETER
rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtl_set_bbreg(hw, RFPGA0_XCD_RFPARAMETER, BIT(3), 0);
rtl_set_bbreg(hw, RFPGA0_XCD_RFPARAMETER, BIT(15), 0);
val32 = rtl_read_dword(rtlpriv, RFPGA0_XCD_RFPARAMETER);
rtl_write_dword(rtlpriv, RFPGA0_XCD_RFPARAMETER, val32);
regvaldw = rtl_read_dword(rtlpriv, RFPGA0_XCD_RFPARAMETER);
rtl_write_dword(rtlpriv, RFPGA0_XCD_RFPARAMETER, regvaldw);
rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER;
rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;