REG_OFDM0_TR_MUX_PAR
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000804e4);
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000804e4);
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000804e4);
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000004e4);
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000804e4);
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000804e4);
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);
REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR,
rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);