drivers/gpu/drm/i915/display/i9xx_wm.c

186

REG_MASKED_FIELD_DISABLE(FW_BLC_SELF_EN);

drivers/gpu/drm/i915/display/i9xx_wm.c

197

REG_MASKED_FIELD_DISABLE(INSTPM_SELF_EN);

drivers/gpu/drm/i915/display/intel_display_irq.c

1644

REG_MASKED_FIELD_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));

drivers/gpu/drm/i915/gt/intel_engine_cs.c

1695

ENGINE_WRITE_FW(engine, RING_MI_MODE, REG_MASKED_FIELD_DISABLE(STOP_RING));

drivers/gpu/drm/i915/gt/intel_engine_pm.c

27

REG_MASKED_FIELD_DISABLE(IDLE_MSG_DISABLE));

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

2942

ENGINE_WRITE_FW(engine, RING_MI_MODE, REG_MASKED_FIELD_DISABLE(STOP_RING));

drivers/gpu/drm/i915/gt/intel_lrc.c

1739

REG_MASKED_FIELD_DISABLE(GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE),

drivers/gpu/drm/i915/gt/intel_lrc.c

850

ctl |= REG_MASKED_FIELD_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);

drivers/gpu/drm/i915/gt/intel_lrc.c

854

ctl |= REG_MASKED_FIELD_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |

drivers/gpu/drm/i915/gt/intel_rc6.c

772

REG_MASKED_FIELD_DISABLE(VLV_COUNT_RANGE_HIGH));

drivers/gpu/drm/i915/gt/intel_reset.c

607

REG_MASKED_FIELD_DISABLE(RESET_CTL_REQUEST_RESET));

drivers/gpu/drm/i915/gt/intel_ring_submission.c

1076

REG_MASKED_FIELD_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));

drivers/gpu/drm/i915/gt/intel_ring_submission.c

278

RING_MI_MODE, REG_MASKED_FIELD_DISABLE(STOP_RING));

drivers/gpu/drm/i915/gt/intel_ring_submission.c

823

*cs++ = REG_MASKED_FIELD_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE);

drivers/gpu/drm/i915/gt/intel_workarounds.c

315

wa_add(wal, reg, 0, REG_MASKED_FIELD_DISABLE(val), val, true);

drivers/gpu/drm/i915/gt/intel_workarounds.c

321

wa_mcr_add(wal, reg, 0, REG_MASKED_FIELD_DISABLE(val), val, true);

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

4419

ENGINE_WRITE_FW(engine, RING_MI_MODE, REG_MASKED_FIELD_DISABLE(STOP_RING));

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

1078

intel_uncore_write_fw(uncore, DMA_CTRL, REG_MASKED_FIELD_DISABLE(dma_flags));

drivers/gpu/drm/i915/gvt/handlers.c

2141

else if (data & REG_MASKED_FIELD_DISABLE(RESET_CTL_REQUEST_RESET))

drivers/gpu/drm/i915/gvt/reg.h

96

((_val) & REG_MASKED_FIELD_DISABLE(_b))

drivers/gpu/drm/i915/i915_perf.c

2640

REG_MASKED_FIELD_DISABLE(GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE),

drivers/gpu/drm/i915/i915_perf.c

2850

return REG_MASKED_FIELD_DISABLE(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS);

drivers/gpu/drm/i915/i915_perf.c

2952

REG_MASKED_FIELD_DISABLE(STALL_DOP_GATING_DISABLE));

drivers/gpu/drm/i915/i915_perf.c

2954

REG_MASKED_FIELD_DISABLE(GEN12_DISABLE_DOP_GATING));

drivers/gpu/drm/i915/intel_clock_gating.c

408

REG_MASKED_FIELD_DISABLE(ECO_FLIP_DONE));

drivers/gpu/drm/i915/intel_clock_gating.c

427

REG_MASKED_FIELD_DISABLE(MI_AGPBUSY_830_MODE));

drivers/gpu/drm/i915/intel_uncore.c

136

#define fw_clear(d, val) writel(REG_MASKED_FIELD_DISABLE((val)), (d)->reg_set)

drivers/gpu/drm/i915/pxp/intel_pxp.c

70

REG_MASKED_FIELD_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES);

drivers/gpu/drm/xe/xe_eu_stall.c

457

write_ptr_reg = REG_MASKED_FIELD_DISABLE(XEHPC_EUSTALL_REPORT_OVERFLOW_DROP);

drivers/gpu/drm/xe/xe_eu_stall.c

855

REG_MASKED_FIELD_DISABLE(DISABLE_DOP_GATING));

drivers/gpu/drm/xe/xe_oa.c

1090

return REG_MASKED_FIELD_DISABLE(OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS);

drivers/gpu/drm/xe/xe_oa.c

1100

return REG_MASKED_FIELD_DISABLE(OAG_OA_DEBUG_BUF_SIZE_SELECT);

drivers/gpu/drm/xe/xe_oa.c

782

REG_MASKED_FIELD_DISABLE(CTX_CTRL_OAC_CONTEXT_ENABLE)

drivers/gpu/drm/xe/xe_oa.c

807

REG_MASKED_FIELD_DISABLE(CTX_CTRL_OAC_CONTEXT_ENABLE | CTX_CTRL_RUN_ALONE),

drivers/gpu/drm/xe/xe_oa.c

836

return REG_MASKED_FIELD_DISABLE(OAG_OA_DEBUG_DISABLE_MMIO_TRG);

drivers/gpu/drm/xe/xe_oa.c

849

REG_MASKED_FIELD_DISABLE(STALL_DOP_GATING_DISABLE));

drivers/gpu/drm/xe/xe_oa.c

851

REG_MASKED_FIELD_DISABLE(DISABLE_DOP_GATING));

drivers/gpu/drm/xe/xe_pxp.c

318

REG_MASKED_FIELD_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES);

drivers/gpu/drm/xe/xe_uc_fw.c

904

xe_mmio_write32(mmio, DMA_CTRL, REG_MASKED_FIELD_DISABLE(dma_flags));