RESET_MP25
RESET_MP25(TIM1_R, RCC_TIM1CFGR, 0, 0),
RESET_MP25(TIM2_R, RCC_TIM2CFGR, 0, 0),
RESET_MP25(TIM3_R, RCC_TIM3CFGR, 0, 0),
RESET_MP25(TIM4_R, RCC_TIM4CFGR, 0, 0),
RESET_MP25(TIM5_R, RCC_TIM5CFGR, 0, 0),
RESET_MP25(TIM6_R, RCC_TIM6CFGR, 0, 0),
RESET_MP25(TIM7_R, RCC_TIM7CFGR, 0, 0),
RESET_MP25(TIM8_R, RCC_TIM8CFGR, 0, 0),
RESET_MP25(TIM10_R, RCC_TIM10CFGR, 0, 0),
RESET_MP25(TIM11_R, RCC_TIM11CFGR, 0, 0),
RESET_MP25(TIM12_R, RCC_TIM12CFGR, 0, 0),
RESET_MP25(TIM13_R, RCC_TIM13CFGR, 0, 0),
RESET_MP25(TIM14_R, RCC_TIM14CFGR, 0, 0),
RESET_MP25(TIM15_R, RCC_TIM15CFGR, 0, 0),
RESET_MP25(TIM16_R, RCC_TIM16CFGR, 0, 0),
RESET_MP25(TIM17_R, RCC_TIM17CFGR, 0, 0),
RESET_MP25(TIM20_R, RCC_TIM20CFGR, 0, 0),
RESET_MP25(LPTIM1_R, RCC_LPTIM1CFGR, 0, 0),
RESET_MP25(LPTIM2_R, RCC_LPTIM2CFGR, 0, 0),
RESET_MP25(LPTIM3_R, RCC_LPTIM3CFGR, 0, 0),
RESET_MP25(LPTIM4_R, RCC_LPTIM4CFGR, 0, 0),
RESET_MP25(LPTIM5_R, RCC_LPTIM5CFGR, 0, 0),
RESET_MP25(SPI1_R, RCC_SPI1CFGR, 0, 0),
RESET_MP25(SPI2_R, RCC_SPI2CFGR, 0, 0),
RESET_MP25(SPI3_R, RCC_SPI3CFGR, 0, 0),
RESET_MP25(SPI4_R, RCC_SPI4CFGR, 0, 0),
RESET_MP25(SPI5_R, RCC_SPI5CFGR, 0, 0),
RESET_MP25(SPI6_R, RCC_SPI6CFGR, 0, 0),
RESET_MP25(SPI7_R, RCC_SPI7CFGR, 0, 0),
RESET_MP25(SPI8_R, RCC_SPI8CFGR, 0, 0),
RESET_MP25(SPDIFRX_R, RCC_SPDIFRXCFGR, 0, 0),
RESET_MP25(USART1_R, RCC_USART1CFGR, 0, 0),
RESET_MP25(USART2_R, RCC_USART2CFGR, 0, 0),
RESET_MP25(USART3_R, RCC_USART3CFGR, 0, 0),
RESET_MP25(UART4_R, RCC_UART4CFGR, 0, 0),
RESET_MP25(UART5_R, RCC_UART5CFGR, 0, 0),
RESET_MP25(USART6_R, RCC_USART6CFGR, 0, 0),
RESET_MP25(UART7_R, RCC_UART7CFGR, 0, 0),
RESET_MP25(UART8_R, RCC_UART8CFGR, 0, 0),
RESET_MP25(UART9_R, RCC_UART9CFGR, 0, 0),
RESET_MP25(LPUART1_R, RCC_LPUART1CFGR, 0, 0),
RESET_MP25(IS2M_R, RCC_IS2MCFGR, 0, 0),
RESET_MP25(I2C1_R, RCC_I2C1CFGR, 0, 0),
RESET_MP25(I2C2_R, RCC_I2C2CFGR, 0, 0),
RESET_MP25(I2C3_R, RCC_I2C3CFGR, 0, 0),
RESET_MP25(I2C4_R, RCC_I2C4CFGR, 0, 0),
RESET_MP25(I2C5_R, RCC_I2C5CFGR, 0, 0),
RESET_MP25(I2C6_R, RCC_I2C6CFGR, 0, 0),
RESET_MP25(I2C7_R, RCC_I2C7CFGR, 0, 0),
RESET_MP25(I2C8_R, RCC_I2C8CFGR, 0, 0),
RESET_MP25(SAI1_R, RCC_SAI1CFGR, 0, 0),
RESET_MP25(SAI2_R, RCC_SAI2CFGR, 0, 0),
RESET_MP25(SAI3_R, RCC_SAI3CFGR, 0, 0),
RESET_MP25(SAI4_R, RCC_SAI4CFGR, 0, 0),
RESET_MP25(MDF1_R, RCC_MDF1CFGR, 0, 0),
RESET_MP25(MDF2_R, RCC_ADF1CFGR, 0, 0),
RESET_MP25(FDCAN_R, RCC_FDCANCFGR, 0, 0),
RESET_MP25(HDP_R, RCC_HDPCFGR, 0, 0),
RESET_MP25(ADC12_R, RCC_ADC12CFGR, 0, 0),
RESET_MP25(ADC3_R, RCC_ADC3CFGR, 0, 0),
RESET_MP25(ETH1_R, RCC_ETH1CFGR, 0, 0),
RESET_MP25(ETH2_R, RCC_ETH2CFGR, 0, 0),
RESET_MP25(USBH_R, RCC_USBHCFGR, 0, 0),
RESET_MP25(USB2PHY1_R, RCC_USB2PHY1CFGR, 0, 0),
RESET_MP25(USB2PHY2_R, RCC_USB2PHY2CFGR, 0, 0),
RESET_MP25(USB3DR_R, RCC_USB3DRCFGR, 0, 0),
RESET_MP25(USB3PCIEPHY_R, RCC_USB3PCIEPHYCFGR, 0, 0),
RESET_MP25(USBTC_R, RCC_USBTCCFGR, 0, 0),
RESET_MP25(ETHSW_R, RCC_ETHSWCFGR, 0, 0),
RESET_MP25(SDMMC1_R, RCC_SDMMC1CFGR, 0, 0),
RESET_MP25(SDMMC1DLL_R, RCC_SDMMC1CFGR, 16, 0),
RESET_MP25(SDMMC2_R, RCC_SDMMC2CFGR, 0, 0),
RESET_MP25(SDMMC2DLL_R, RCC_SDMMC2CFGR, 16, 0),
RESET_MP25(SDMMC3_R, RCC_SDMMC3CFGR, 0, 0),
RESET_MP25(SDMMC3DLL_R, RCC_SDMMC3CFGR, 16, 0),
RESET_MP25(GPU_R, RCC_GPUCFGR, 0, 0),
RESET_MP25(LTDC_R, RCC_LTDCCFGR, 0, 0),
RESET_MP25(DSI_R, RCC_DSICFGR, 0, 0),
RESET_MP25(LVDS_R, RCC_LVDSCFGR, 0, 0),
RESET_MP25(CSI_R, RCC_CSICFGR, 0, 0),
RESET_MP25(DCMIPP_R, RCC_DCMIPPCFGR, 0, 0),
RESET_MP25(CCI_R, RCC_CCICFGR, 0, 0),
RESET_MP25(VDEC_R, RCC_VDECCFGR, 0, 0),
RESET_MP25(VENC_R, RCC_VENCCFGR, 0, 0),
RESET_MP25(WWDG1_R, RCC_WWDG1CFGR, 0, 0),
RESET_MP25(WWDG2_R, RCC_WWDG2CFGR, 0, 0),
RESET_MP25(VREF_R, RCC_VREFCFGR, 0, 0),
RESET_MP25(DTS_R, RCC_DTSCFGR, 0, 0),
RESET_MP25(CRC_R, RCC_CRCCFGR, 0, 0),
RESET_MP25(SERC_R, RCC_SERCCFGR, 0, 0),
RESET_MP25(OSPIIOM_R, RCC_OSPIIOMCFGR, 0, 0),
RESET_MP25(I3C1_R, RCC_I3C1CFGR, 0, 0),
RESET_MP25(I3C2_R, RCC_I3C2CFGR, 0, 0),
RESET_MP25(I3C3_R, RCC_I3C3CFGR, 0, 0),
RESET_MP25(I3C4_R, RCC_I3C4CFGR, 0, 0),
RESET_MP25(IWDG2_KER_R, RCC_IWDGC1CFGSETR, 18, 1),
RESET_MP25(IWDG4_KER_R, RCC_IWDGC2CFGSETR, 18, 1),
RESET_MP25(RNG_R, RCC_RNGCFGR, 0, 0),
RESET_MP25(PKA_R, RCC_PKACFGR, 0, 0),
RESET_MP25(SAES_R, RCC_SAESCFGR, 0, 0),
RESET_MP25(HASH_R, RCC_HASHCFGR, 0, 0),
RESET_MP25(CRYP1_R, RCC_CRYP1CFGR, 0, 0),
RESET_MP25(CRYP2_R, RCC_CRYP2CFGR, 0, 0),
RESET_MP25(PCIE_R, RCC_PCIECFGR, 0, 0),