RESET_MP21
RESET_MP21(TIM1_R, RCC_TIM1CFGR, 0, 0),
RESET_MP21(TIM2_R, RCC_TIM2CFGR, 0, 0),
RESET_MP21(TIM3_R, RCC_TIM3CFGR, 0, 0),
RESET_MP21(TIM4_R, RCC_TIM4CFGR, 0, 0),
RESET_MP21(TIM5_R, RCC_TIM5CFGR, 0, 0),
RESET_MP21(TIM6_R, RCC_TIM6CFGR, 0, 0),
RESET_MP21(TIM7_R, RCC_TIM7CFGR, 0, 0),
RESET_MP21(TIM8_R, RCC_TIM8CFGR, 0, 0),
RESET_MP21(TIM10_R, RCC_TIM10CFGR, 0, 0),
RESET_MP21(TIM11_R, RCC_TIM11CFGR, 0, 0),
RESET_MP21(TIM12_R, RCC_TIM12CFGR, 0, 0),
RESET_MP21(TIM13_R, RCC_TIM13CFGR, 0, 0),
RESET_MP21(TIM14_R, RCC_TIM14CFGR, 0, 0),
RESET_MP21(TIM15_R, RCC_TIM15CFGR, 0, 0),
RESET_MP21(TIM16_R, RCC_TIM16CFGR, 0, 0),
RESET_MP21(TIM17_R, RCC_TIM17CFGR, 0, 0),
RESET_MP21(LPTIM1_R, RCC_LPTIM1CFGR, 0, 0),
RESET_MP21(LPTIM2_R, RCC_LPTIM2CFGR, 0, 0),
RESET_MP21(LPTIM3_R, RCC_LPTIM3CFGR, 0, 0),
RESET_MP21(LPTIM4_R, RCC_LPTIM4CFGR, 0, 0),
RESET_MP21(LPTIM5_R, RCC_LPTIM5CFGR, 0, 0),
RESET_MP21(SPI1_R, RCC_SPI1CFGR, 0, 0),
RESET_MP21(SPI2_R, RCC_SPI2CFGR, 0, 0),
RESET_MP21(SPI3_R, RCC_SPI3CFGR, 0, 0),
RESET_MP21(SPI4_R, RCC_SPI4CFGR, 0, 0),
RESET_MP21(SPI5_R, RCC_SPI5CFGR, 0, 0),
RESET_MP21(SPI6_R, RCC_SPI6CFGR, 0, 0),
RESET_MP21(SPDIFRX_R, RCC_SPDIFRXCFGR, 0, 0),
RESET_MP21(USART1_R, RCC_USART1CFGR, 0, 0),
RESET_MP21(USART2_R, RCC_USART2CFGR, 0, 0),
RESET_MP21(USART3_R, RCC_USART3CFGR, 0, 0),
RESET_MP21(UART4_R, RCC_UART4CFGR, 0, 0),
RESET_MP21(UART5_R, RCC_UART5CFGR, 0, 0),
RESET_MP21(USART6_R, RCC_USART6CFGR, 0, 0),
RESET_MP21(UART7_R, RCC_UART7CFGR, 0, 0),
RESET_MP21(LPUART1_R, RCC_LPUART1CFGR, 0, 0),
RESET_MP21(I2C1_R, RCC_I2C1CFGR, 0, 0),
RESET_MP21(I2C2_R, RCC_I2C2CFGR, 0, 0),
RESET_MP21(I2C3_R, RCC_I2C3CFGR, 0, 0),
RESET_MP21(SAI1_R, RCC_SAI1CFGR, 0, 0),
RESET_MP21(SAI2_R, RCC_SAI2CFGR, 0, 0),
RESET_MP21(SAI3_R, RCC_SAI3CFGR, 0, 0),
RESET_MP21(SAI4_R, RCC_SAI4CFGR, 0, 0),
RESET_MP21(MDF1_R, RCC_MDF1CFGR, 0, 0),
RESET_MP21(FDCAN_R, RCC_FDCANCFGR, 0, 0),
RESET_MP21(HDP_R, RCC_HDPCFGR, 0, 0),
RESET_MP21(ADC1_R, RCC_ADC1CFGR, 0, 0),
RESET_MP21(ADC2_R, RCC_ADC2CFGR, 0, 0),
RESET_MP21(ETH1_R, RCC_ETH1CFGR, 0, 0),
RESET_MP21(ETH2_R, RCC_ETH2CFGR, 0, 0),
RESET_MP21(OTG_R, RCC_OTGCFGR, 0, 0),
RESET_MP21(USBH_R, RCC_USBHCFGR, 0, 0),
RESET_MP21(USB2PHY1_R, RCC_USB2PHY1CFGR, 0, 0),
RESET_MP21(USB2PHY2_R, RCC_USB2PHY2CFGR, 0, 0),
RESET_MP21(SDMMC1_R, RCC_SDMMC1CFGR, 0, 0),
RESET_MP21(SDMMC1DLL_R, RCC_SDMMC1CFGR, 16, 0),
RESET_MP21(SDMMC2_R, RCC_SDMMC2CFGR, 0, 0),
RESET_MP21(SDMMC2DLL_R, RCC_SDMMC2CFGR, 16, 0),
RESET_MP21(SDMMC3_R, RCC_SDMMC3CFGR, 0, 0),
RESET_MP21(SDMMC3DLL_R, RCC_SDMMC3CFGR, 16, 0),
RESET_MP21(LTDC_R, RCC_LTDCCFGR, 0, 0),
RESET_MP21(CSI_R, RCC_CSICFGR, 0, 0),
RESET_MP21(DCMIPP_R, RCC_DCMIPPCFGR, 0, 0),
RESET_MP21(DCMIPSSI_R, RCC_DCMIPSSICFGR, 0, 0),
RESET_MP21(WWDG1_R, RCC_WWDG1CFGR, 0, 0),
RESET_MP21(VREF_R, RCC_VREFCFGR, 0, 0),
RESET_MP21(DTS_R, RCC_DTSCFGR, 0, 0),
RESET_MP21(CRC_R, RCC_CRCCFGR, 0, 0),
RESET_MP21(SERC_R, RCC_SERCCFGR, 0, 0),
RESET_MP21(I3C1_R, RCC_I3C1CFGR, 0, 0),
RESET_MP21(I3C2_R, RCC_I3C2CFGR, 0, 0),
RESET_MP21(IWDG2_KER_R, RCC_IWDGC1CFGSETR, 18, 1),
RESET_MP21(IWDG4_KER_R, RCC_IWDGC2CFGSETR, 18, 1),
RESET_MP21(RNG1_R, RCC_RNG1CFGR, 0, 0),
RESET_MP21(RNG2_R, RCC_RNG2CFGR, 0, 0),
RESET_MP21(PKA_R, RCC_PKACFGR, 0, 0),
RESET_MP21(SAES_R, RCC_SAESCFGR, 0, 0),
RESET_MP21(HASH1_R, RCC_HASH1CFGR, 0, 0),
RESET_MP21(HASH2_R, RCC_HASH2CFGR, 0, 0),
RESET_MP21(CRYP1_R, RCC_CRYP1CFGR, 0, 0),
RESET_MP21(CRYP2_R, RCC_CRYP2CFGR, 0, 0),