drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

100

*trap_mask_prev = REG_GET_FIELD(kfd_dbg_trap_cntl_prev, SPI_GDBG_PER_VMID_CNTL, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

329

2 << REG_GET_FIELD(m->cp_hqd_pq_control,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

424

uint32_t ret = REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

426

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_START))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

429

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_END))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

518

bool is_active = !!REG_GET_FIELD(status, SDMA_RLC0_CONTEXT_STATUS, SELECTED);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

254

2 << REG_GET_FIELD(m->cp_hqd_pq_control,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

563

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, PROCESSING_IQ)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

567

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, ACTIVE)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

568

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, RETRY_TYPE)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

575

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, WAIT_TIME)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

842

*trap_mask_prev = REG_GET_FIELD(data, SPI_GDBG_TRAP_MASK, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

240

2 << REG_GET_FIELD(m->cp_hqd_pq_control,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

225

2 << REG_GET_FIELD(m->cp_hqd_pq_control,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

696

uint32_t ret = REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

698

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_START))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

701

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_END))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

263

uint32_t ret = REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

265

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_START))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

268

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_END))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

266

uint32_t ret = REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

268

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_START))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

271

if (REG_GET_FIELD(mask, SPI_GDBG_PER_VMID_CNTL, TRAP_ON_END))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

398

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, PROCESSING_IQ)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

402

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, ACTIVE)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

403

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, RETRY_TYPE)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

410

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, WAIT_TIME)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

561

return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

433

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, PROCESSING_IQ)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

437

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, ACTIVE)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

438

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, RETRY_TYPE)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

445

if (REG_GET_FIELD(temp, CP_HQD_IQ_TIMER, WAIT_TIME)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

268

2 << REG_GET_FIELD(m->cp_hqd_pq_control,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

776

*trap_mask_prev = REG_GET_FIELD(data, SPI_GDBG_TRAP_MASK, EXCP_EN);

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

46

if (REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

47

REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1)

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

57

if ((REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

58

(REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

59

REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

60

REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

61

REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

62

REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1))

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5308

!REG_GET_FIELD(err_status_lo_data, ERR_STATUS_LO, ERR_STATUS_VALID_FLAG))

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5311

*memory_id = REG_GET_FIELD(err_status_lo_data, ERR_STATUS_LO, MEMORY_ID);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5332

!REG_GET_FIELD(err_status_hi_data, ERR_STATUS_HI, ERR_INFO_VALID_FLAG))

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5337

*err_cnt = REG_GET_FIELD(err_status_hi_data, ERR_STATUS, ERR_CNT);

drivers/gpu/drm/amd/amdgpu/cik.c

1923

cnt0_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER0_UPPER);

drivers/gpu/drm/amd/amdgpu/cik.c

1924

cnt1_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER1_UPPER);

drivers/gpu/drm/amd/amdgpu/cik.c

1941

if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) &&

drivers/gpu/drm/amd/amdgpu/cz_ih.c

203

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/cz_ih.c

209

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/cz_ih.c

359

if (REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY))

drivers/gpu/drm/amd/amdgpu/cz_ih.c

374

if (!REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY))

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

421

if (REG_GET_FIELD(tmp, CRTC_CONTROL, CRTC_MASTER_EN)) {

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

491

crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]),

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

638

if (REG_GET_FIELD(tmp, PIPE0_DMIF_BUFFER_CONTROL, DMIF_BUFFERS_ALLOCATION_COMPLETED))

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

672

switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) {

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1159

if (REG_GET_FIELD(tmp, AZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

449

crtc_enabled = REG_GET_FIELD(RREG32(mmCRTC_CONTROL + crtc_offsets[i]),

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

228

adev->df.hash_status.hash_64k = REG_GET_FIELD(tmp,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

231

adev->df.hash_status.hash_2m = REG_GET_FIELD(tmp,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

234

adev->df.hash_status.hash_1g = REG_GET_FIELD(tmp,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

650

v0 = REG_GET_FIELD(hw_assert_msklo,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

652

v1 = REG_GET_FIELD(hw_assert_msklo,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

654

v28 = REG_GET_FIELD(hw_assert_mskhi,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

656

v31 = REG_GET_FIELD(hw_assert_mskhi,

drivers/gpu/drm/amd/amdgpu/df_v4_3.c

39

v0 = REG_GET_FIELD(hw_assert_msklo,

drivers/gpu/drm/amd/amdgpu/df_v4_3.c

41

v1 = REG_GET_FIELD(hw_assert_msklo,

drivers/gpu/drm/amd/amdgpu/df_v4_3.c

43

v28 = REG_GET_FIELD(hw_assert_mskhi,

drivers/gpu/drm/amd/amdgpu/df_v4_3.c

45

v31 = REG_GET_FIELD(hw_assert_mskhi,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4611

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4630

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4637

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4640

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4643

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4646

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5336

REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, TCC_DISABLE) |

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5337

(REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, HI_TCC_DISABLE) << 16);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5906

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5943

if (1 == REG_GET_FIELD(tmp, CP_CE_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5980

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6017

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6049

(REG_GET_FIELD(bootload_status,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6153

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6231

if (1 == REG_GET_FIELD(tmp, CP_CE_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6308

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6683

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7617

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, mmGRBM_STATUS),

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7635

if (!REG_GET_FIELD(tmp, GRBM_STATUS, GUI_ACTIVE))

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7679

if (REG_GET_FIELD(tmp, GRBM_STATUS2, RLC_BUSY_Sienna_Cichlid))

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7686

if (REG_GET_FIELD(tmp, GRBM_STATUS2, RLC_BUSY))

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7873

return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7897

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid),

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7908

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE),

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2028

gc_disabled_sa_mask = REG_GET_FIELD(gc_disabled_sa_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2032

gc_user_disabled_sa_mask = REG_GET_FIELD(gc_user_disabled_sa_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2047

gc_disabled_rb_mask = REG_GET_FIELD(gc_disabled_rb_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2051

gc_user_disabled_rb_mask = REG_GET_FIELD(gc_user_disabled_rb_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2168

REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, TCC_DISABLE) |

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2169

(REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, HI_TCC_DISABLE) << 16);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2188

REG_GET_FIELD(tmp, TA_CNTL2, TRUNCATE_COORD_MODE);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2550

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2594

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2639

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2696

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2714

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2776

if (1 == REG_GET_FIELD(tmp, CP_GFX_RS64_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2818

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2837

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2899

if (1 == REG_GET_FIELD(tmp, CP_GFX_RS64_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2963

if (1 == REG_GET_FIELD(tmp, CP_MEC_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2982

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3109

(REG_GET_FIELD(bootload_status,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3311

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3329

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3391

if (1 == REG_GET_FIELD(tmp, CP_GFX_RS64_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3529

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3548

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3610

if (1 == REG_GET_FIELD(tmp, CP_GFX_RS64_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4061

if (1 == REG_GET_FIELD(tmp, CP_MEC_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4080

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4791

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4796

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4803

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4806

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4809

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4812

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5083

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, regGRBM_STATUS),

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5101

if (!REG_GET_FIELD(tmp, GRBM_STATUS, GUI_ACTIVE))

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5432

return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5447

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE),

drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.c

53

if (REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA0_FED_ERR) ||

drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.c

54

REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA1_FED_ERR))

drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.c

93

if (REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA0_FED_ERR) ||

drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.c

94

REG_GET_FIELD(rlc_status0, RLC_RLCS_FED_STATUS_0, SDMA1_FED_ERR)) {

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1706

gc_disabled_sa_mask = REG_GET_FIELD(gc_disabled_sa_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1710

gc_user_disabled_sa_mask = REG_GET_FIELD(gc_user_disabled_sa_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1725

gc_disabled_rb_mask = REG_GET_FIELD(gc_disabled_rb_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1729

gc_user_disabled_rb_mask = REG_GET_FIELD(gc_user_disabled_rb_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2316

(REG_GET_FIELD(bootload_status,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2435

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2453

if (1 == REG_GET_FIELD(tmp, CP_PFP_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2488

if (1 == REG_GET_FIELD(tmp, CP_GFX_RS64_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2579

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2598

if (1 == REG_GET_FIELD(tmp, CP_ME_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2633

if (1 == REG_GET_FIELD(tmp, CP_GFX_RS64_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2914

if (1 == REG_GET_FIELD(tmp, CP_MEC_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2933

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3605

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3610

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3617

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3620

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3623

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3626

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3910

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, regGRBM_STATUS),

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3928

if (!REG_GET_FIELD(tmp, GRBM_STATUS, GUI_ACTIVE))

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3998

return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4014

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1363

gc_disabled_sa_mask = REG_GET_FIELD(gc_disabled_sa_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1367

gc_user_disabled_sa_mask = REG_GET_FIELD(gc_user_disabled_sa_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1384

gc_disabled_rb_mask = REG_GET_FIELD(gc_disabled_rb_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1389

gc_user_disabled_rb_mask = REG_GET_FIELD(gc_user_disabled_rb_mask,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1905

(REG_GET_FIELD(bootload_status,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2094

if (1 == REG_GET_FIELD(tmp, CP_MEC_DC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2113

if (1 == REG_GET_FIELD(tmp, CP_CPC_IC_OP_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2653

1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG_READ, NUM_PKRS);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2658

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2665

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2668

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2671

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2674

REG_GET_FIELD(adev->gfx.config.gb_addr_config,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2940

if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3016

return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3032

if (!REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3864

if (REG_GET_FIELD(rlc_fed_status, RLC_RLCS_FED_STATUS, SDMA0_FED_ERR) ||

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3865

REG_GET_FIELD(rlc_fed_status, RLC_RLCS_FED_STATUS, SDMA1_FED_ERR))

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

733

return REG_GET_FIELD(reg_data, GFX_IMU_PARTITION_SWITCH, TOTAL_XCCS_IN_XCP);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1336

data = REG_GET_FIELD(data, GC_USER_RB_BACKEND_DISABLE, BACKEND_DISABLE);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1542

return ~REG_GET_FIELD(data, CC_GC_SHADER_ARRAY_CONFIG, INACTIVE_CUS) & mask;

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1604

(REG_GET_FIELD(RREG32(mmCGTS_TCC_DISABLE),

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1606

REG_GET_FIELD(RREG32(mmCGTS_USER_TCC_DISABLE),

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4251

adev->gfx.config.num_banks = REG_GET_FIELD(mc_arb_ramcfg,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4253

adev->gfx.config.num_ranks = REG_GET_FIELD(mc_arb_ramcfg,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4261

dimm00_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM0_BANK_ADDR_MAPPING, DIMM0ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4262

dimm01_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM0_BANK_ADDR_MAPPING, DIMM1ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4265

dimm10_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM1_BANK_ADDR_MAPPING, DIMM0ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4266

dimm11_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM1_BANK_ADDR_MAPPING, DIMM1ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1784

adev->gfx.config.num_banks = REG_GET_FIELD(mc_arb_ramcfg,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1786

adev->gfx.config.num_ranks = REG_GET_FIELD(mc_arb_ramcfg,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1794

dimm00_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM0_BANK_ADDR_MAPPING, DIMM0ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1795

dimm01_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM0_BANK_ADDR_MAPPING, DIMM1ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1798

dimm10_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM1_BANK_ADDR_MAPPING, DIMM0ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1799

dimm11_addr_map = REG_GET_FIELD(tmp, MC_FUS_DRAM1_BANK_ADDR_MAPPING, DIMM1ADDRMAP);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1818

tmp = REG_GET_FIELD(mc_arb_ramcfg, MC_ARB_RAMCFG, NOOFCOLS);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3424

data = REG_GET_FIELD(data, GC_USER_RB_BACKEND_DISABLE, BACKEND_DISABLE);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4806

if (REG_GET_FIELD(RREG32(mmGRBM_STATUS), GRBM_STATUS, GUI_ACTIVE)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4919

if (REG_GET_FIELD(tmp, GRBM_STATUS2, RLC_BUSY))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4923

if (REG_GET_FIELD(tmp, GRBM_STATUS2, CPF_BUSY) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4924

REG_GET_FIELD(tmp, GRBM_STATUS2, CPC_BUSY) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4925

REG_GET_FIELD(tmp, GRBM_STATUS2, CPG_BUSY)) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4938

if (REG_GET_FIELD(tmp, SRBM_STATUS, GRBM_RQ_PENDING))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4941

if (REG_GET_FIELD(tmp, SRBM_STATUS, SEM_BUSY))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4970

if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4971

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_GFX))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4975

if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4976

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CPF) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4977

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CPC) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4978

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CPG)) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5070

if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5071

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CPF) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5072

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CPC) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5073

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CPG)) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5089

if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) ||

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5090

REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_GFX))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5561

if (!REG_GET_FIELD(RREG32(mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5578

if (!REG_GET_FIELD(RREG32(mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6668

enc = REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_CMN, ENCODING);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6669

se_id = REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_CMN, SE_ID);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6679

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, IMMED_OVERFLOW),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6680

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, HOST_REG_OVERFLOW),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6681

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, HOST_CMD_OVERFLOW),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6682

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, CMD_TIMESTAMP),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6683

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, REG_TIMESTAMP),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6684

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, THREAD_TRACE_BUF_FULL),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6685

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, WLT),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6686

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_AUTO, THREAD_TRACE)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6692

cu_id = REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_WAVE, CU_ID);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6693

sh_id = REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_WAVE, SH_ID);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6704

sq_edc_source = REG_GET_FIELD(RREG32(mmSQ_EDC_INFO), SQ_EDC_INFO, SOURCE);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6720

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_WAVE, SIMD_ID),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6721

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_WAVE, WAVE_ID),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6722

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_WAVE, VM_ID),

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6723

REG_GET_FIELD(ih_data, SQ_INTERRUPT_WORD_WAVE, PRIV) ? "true" : "false",

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7070

return ~REG_GET_FIELD(data, CC_GC_SHADER_ARRAY_CONFIG, INACTIVE_CUS) & mask;

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2117

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2126

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2131

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2136

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2141

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2146

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4177

if (REG_GET_FIELD(RREG32_SOC15(GC, 0, mmGRBM_STATUS),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4224

if (REG_GET_FIELD(tmp, GRBM_STATUS2, RLC_BUSY))

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4957

if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6932

sec_count = REG_GET_FIELD(data, VM_L2_MEM_ECC_CNT, SEC_COUNT);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6939

ded_count = REG_GET_FIELD(data, VM_L2_MEM_ECC_CNT, DED_COUNT);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6951

sec_count = REG_GET_FIELD(data, VM_L2_WALKER_MEM_ECC_CNT,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6959

ded_count = REG_GET_FIELD(data, VM_L2_WALKER_MEM_ECC_CNT,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

710

sec_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, SEC_COUNT);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

718

ded_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, DED_COUNT);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

731

sec_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

740

ded_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

754

sec_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, SEC_COUNT);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

762

ded_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, DED_COUNT);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

775

sec_count = REG_GET_FIELD(data, ATC_L2_CACHE_2M_DSM_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

784

ded_count = REG_GET_FIELD(data, ATC_L2_CACHE_2M_DSM_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

798

sec_count = REG_GET_FIELD(data, ATC_L2_CACHE_4K_DSM_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

807

ded_count = REG_GET_FIELD(data, ATC_L2_CACHE_4K_DSM_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

992

if (REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_RDRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

993

REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_WRRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

994

REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_RDRSP_DATAPARITY_ERROR)) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1729

if (REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_RDRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1730

REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_WRRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1731

REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_RDRSP_DATAPARITY_ERROR)) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1421

if (!REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE), RLC_SAFE_MODE, CMD))

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2500

if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2504

if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2552

if (REG_GET_FIELD(tmp, GRBM_STATUS2, RLC_BUSY))

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

794

return REG_GET_FIELD(xcp_ctl, CP_HYP_XCP_CTL, NUM_XCC_IN_XCP);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

934

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

943

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

948

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

953

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

958

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

963

REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

102

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

105

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

83

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

93

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

96

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

99

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

101

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

104

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

107

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

85

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

95

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

98

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

724

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

735

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

738

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

741

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

744

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

747

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

100

REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

54

seg_size = REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

58

REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE, PF_MAX_REGION);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

61

seg_size = REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

65

REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c

96

REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL_ALDE,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

600

seg_size = REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

604

REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

619

REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

101

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

79

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

89

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

92

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

95

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

98

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

101

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

104

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

82

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

92

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

95

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

98

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

100

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

78

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

88

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

91

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

94

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

97

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

100

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

103

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

81

u32 cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

91

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

94

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

97

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

529

if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

537

size = (REG_GET_FIELD(viewport,

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

539

REG_GET_FIELD(pitch, HUBPREQ0_DCSURF_SURFACE_PITCH, PITCH) *

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

520

if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

528

size = (REG_GET_FIELD(viewport,

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

530

REG_GET_FIELD(pitch, HUBPREQ0_DCSURF_SURFACE_PITCH, PITCH) *

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

610

u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

611

u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

614

mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

619

REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

76

if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

794

if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

799

size = (REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_HEIGHT) *

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

800

REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_WIDTH) *

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

100

if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1288

vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1293

u32 protections = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1298

info->mc_id = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

199

running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

222

if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

228

if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

335

if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE))

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

341

switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) {

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

766

u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

767

u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

773

mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

778

REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

965

if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

970

size = (REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_HEIGHT) *

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

971

REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_WIDTH) *

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1000

u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1001

u32 protections = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1007

mc_id = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1012

REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1073

if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1078

size = (REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_HEIGHT) *

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1079

REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_WIDTH) *

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1476

vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1481

u32 protections = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1486

info->mc_id = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

182

if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

309

running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

332

if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

338

if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

521

if (REG_GET_FIELD(tmp, MC_ARB_RAMCFG, CHANSIZE))

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

527

switch (REG_GET_FIELD(tmp, MC_SHARED_CHMAP, NOOFCHAN)) {

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1265

if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1274

size = (REG_GET_FIELD(viewport,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1276

REG_GET_FIELD(viewport,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1282

size = (REG_GET_FIELD(viewport,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1284

REG_GET_FIELD(viewport,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1290

size = (REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) *

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

1291

REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_WIDTH) *

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

634

cid = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, CID);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

635

rw = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, RW);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

636

fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

668

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

671

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

674

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

677

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

203

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

209

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

353

if (REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY))

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

368

if (!REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY))

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

444

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

448

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

415

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

419

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

462

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

466

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

290

inst_index = REG_GET_FIELD(data, GRBM_GFX_INDEX, INSTANCE_INDEX);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

295

val = REG_GET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES) << 18 |

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

296

REG_GET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES) << 19 |

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

297

REG_GET_FIELD(data, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES) << 20 |

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

298

REG_GET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX) << 21 |

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

299

REG_GET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX) << 25 |

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

822

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG0_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

826

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG1_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

830

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG0_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

834

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG1_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1393

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG0_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1397

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG1_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

973

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG0_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

977

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG1_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

1322

if (REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_RDRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

1323

REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_WRRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

1324

REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_RDRSP_DATAPARITY_ERROR)) {

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

146

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

148

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

158

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

161

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

164

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

167

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

100

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

103

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

106

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

85

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

87

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

97

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

102

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

104

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

114

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

117

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

120

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

123

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

109

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

111

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

121

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

124

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

127

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

130

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

102

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

104

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

114

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

117

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

120

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

123

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

222

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

224

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

237

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

240

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

243

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

246

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

107

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

110

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

113

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

116

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

95

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

97

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

104

REG_GET_FIELD(xgmi_lfb_cntl, MMMC_VM_XGMI_LFB_CNTL, PF_LFB_REGION);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

721

cid = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

723

rw = REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

733

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

736

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

739

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

742

REG_GET_FIELD(status,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

89

seg_size = REG_GET_FIELD(

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

93

REG_GET_FIELD(xgmi_lfb_cntl, MMMC_VM_XGMI_LFB_CNTL, PF_MAX_REGION);

drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

1685

if (REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_RDRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

1686

REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_WRRSP_STATUS) ||

drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

1687

REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_RDRSP_DATAPARITY_ERROR)) {

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

420

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

428

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

488

rom_offset = REG_GET_FIELD(data, REGS_ROM_OFFSET_CTRL, ROM_OFFSET);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

702

if (REG_GET_FIELD(bif_doorbell_int_cntl,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

354

rom_offset = REG_GET_FIELD(data, REGS_ROM_OFFSET_CTRL, ROM_OFFSET);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

600

if (REG_GET_FIELD(bif_doorbell_int_cntl,

drivers/gpu/drm/amd/amdgpu/nbio_v6_3_2.c

317

px = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_COMPUTE_STATUS,

drivers/gpu/drm/amd/amdgpu/nbio_v6_3_2.c

328

tmp = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_MEM_STATUS,

drivers/gpu/drm/amd/amdgpu/nbio_v6_3_2.c

340

tmp = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_MEM_STATUS, NPS_MODE);

drivers/gpu/drm/amd/amdgpu/nbio_v6_3_2.c

58

tmp = REG_GET_FIELD(tmp, RCC_STRAP0_RCC_DEV0_EPF0_STRAP0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

374

if (REG_GET_FIELD(bif_doorbell_intr_cntl,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

431

if (REG_GET_FIELD(bif_doorbell_intr_cntl,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

598

corr = REG_GET_FIELD(global_sts, RAS_GLOBAL_STATUS_LO, ParityErrCorr);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

599

fatal = REG_GET_FIELD(global_sts, RAS_GLOBAL_STATUS_LO, ParityErrFatal);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

600

non_fatal = REG_GET_FIELD(global_sts, RAS_GLOBAL_STATUS_LO,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

631

if (REG_GET_FIELD(central_sts, BIFL_RAS_CENTRAL_STATUS,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

400

px = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_COMPUTE_STATUS,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

411

tmp = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_MEM_STATUS,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

423

tmp = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_MEM_STATUS, NPS_MODE);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

530

if (REG_GET_FIELD(bif_doorbell_intr_cntl,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

54

rev_id = REG_GET_FIELD(rev_id, RCC_STRAP0_RCC_DEV0_EPF0_STRAP0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

576

if (REG_GET_FIELD(bif_doorbell_intr_cntl,

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1271

if (REG_GET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_SDMA) ||

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1272

REG_GET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_SDMA1)) {

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1290

if (REG_GET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_SDMA) ||

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1291

REG_GET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_SDMA1)) {

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1730

if (!REG_GET_FIELD(RREG32_SDMA(ring->me, regSDMA_F32_CNTL), SDMA_F32_CNTL, HALT))

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1588

if (REG_GET_FIELD(freeze, SDMA0_FREEZE, FROZEN) & 1)

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1500

if (REG_GET_FIELD(freeze, SDMA0_FREEZE, FROZEN) & 1)

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

736

if ((REG_GET_FIELD(ic_op_cntl, SDMA0_IC_OP_CNTL, ICACHE_PRIMED) == 1) &&

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

737

(REG_GET_FIELD(sdma_status, SDMA0_STATUS_REG, UCODE_INIT_DONE) == 1))

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

725

if ((REG_GET_FIELD(ic_op_cntl, SDMA0_SDMA_IC_OP_CNTL, ICACHE_PRIMED) == 1) &&

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

726

(REG_GET_FIELD(sdma_status, SDMA0_SDMA_STATUS_REG, UCODE_INIT_DONE) == 1))

drivers/gpu/drm/amd/amdgpu/si.c

1626

cnt0_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER0_UPPER);

drivers/gpu/drm/amd/amdgpu/si.c

1627

cnt1_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER1_UPPER);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

189

} while (REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFE) == 0);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

197

if (REG_GET_FIELD(reg, CKSVII2C_IC_INTR_STAT, R_TX_ABRT) == 1) {

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

204

if (REG_GET_FIELD(reg_c_tx_abrt_source,

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

210

} else if (REG_GET_FIELD(reg_c_tx_abrt_source,

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

235

if (REG_GET_FIELD(reg_c_tx_abrt_source,

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

253

} while (REG_GET_FIELD(reg_ic_status, CKSVII2C_IC_STATUS, RFNE) == 0);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

301

if (!REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFNF)) {

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

425

data[bytes_received] = REG_GET_FIELD(reg, CKSVII2C_IC_DATA_CMD, DAT);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

472

if ((REG_GET_FIELD(reg_ic_enable, CKSVII2C_IC_ENABLE, ENABLE) == 0) &&

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

473

(REG_GET_FIELD(reg_ic_enable_status, CKSVII2C_IC_ENABLE_STATUS, IC_EN) == 1)) {

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

479

} else if (REG_GET_FIELD(reg_ic_enable, CKSVII2C_IC_ENABLE, ENABLE) == 0) {

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

488

if (REG_GET_FIELD(reg_ic_clr_activity,

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

90

if (REG_GET_FIELD(en_stat, CKSVII2C_IC_ENABLE_STATUS, IC_EN))

drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c

103

socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c

120

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c

137

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c

86

die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0_3.c

43

die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0_3.c

60

socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0_3.c

79

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

108

socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

125

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

152

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, TOPOLOGY_ID);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

168

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

193

data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE);

drivers/gpu/drm/amd/amdgpu/smuio_v15_0_8.c

91

die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID);

drivers/gpu/drm/amd/amdgpu/soc15.c

769

cnt0_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER0_UPPER);

drivers/gpu/drm/amd/amdgpu/soc15.c

770

cnt1_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER1_UPPER);

drivers/gpu/drm/amd/amdgpu/soc15.c

818

cnt0_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK3, COUNTER0_UPPER);

drivers/gpu/drm/amd/amdgpu/soc15.c

819

cnt1_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK3, COUNTER1_UPPER);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

205

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

211

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

371

if (REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY))

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

386

if (!REG_GET_FIELD(tmp, SRBM_STATUS, IH_BUSY))

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

100

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1));

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

108

return (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

109

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

110

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

111

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 0) ||

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

113

((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 0x5 ||

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

114

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 0xb) &&

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

409

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

584

hwid = REG_GET_FIELD(ipid, MCMP1_IPIDT0, HardwareID);

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

585

mcatype = REG_GET_FIELD(ipid, MCMP1_IPIDT0, McaType);

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

599

err_addr = REG_GET_FIELD(addr,

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

78

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val),

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

79

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Poison),

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

80

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred),

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

81

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC),

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

82

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC),

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

83

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC)

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

87

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

88

((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1) ||

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

89

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Poison) == 1)));

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

97

return ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

98

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

99

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

85

#define MCA_IPID_2_DIE_ID(ipid) ((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi) >> 2) & 0x03)

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

88

(MCA_IPID_LO_2_UMC_CH(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo)))

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

91

(MCA_IPID_LO_2_UMC_INST(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo)))

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

94

(((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo) & 0x1) << 2) | \

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

95

(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi) & 0x03))

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

204

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

214

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

220

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

221

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

222

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1)

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

245

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

246

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

247

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

248

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

249

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

250

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1))

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

332

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

333

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

337

lsb = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, LSB);

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

338

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v6_1.c

82

return REG_GET_FIELD(rsmu_umc_val,

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

110

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

111

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

122

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

151

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

152

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

153

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

154

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

155

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

156

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) {

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

241

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

242

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

245

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

288

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

298

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_EccErrCnt, EccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

304

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

305

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

322

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

349

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

350

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

351

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

352

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

353

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

354

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) {

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

468

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

469

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

472

REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

502

return REG_GET_FIELD(ecc_ctrl, UMCCH0_0_EccCtrl, UCFatalEn);

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

66

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1)

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

118

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

119

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1)

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

134

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

135

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

136

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

137

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

138

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

139

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1))

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

222

addr_lsb = REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, AddrLsb);

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

269

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

270

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, AddrV) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

271

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

275

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

369

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

370

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

371

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

372

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

373

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

374

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1)) {

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

424

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

425

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, AddrV) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

426

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1)) {

drivers/gpu/drm/amd/amdgpu/umc_v8_10.c

429

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v8_14.c

73

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_GeccErrCnt, GeccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v8_14.c

88

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_GeccErrCnt, GeccUnCorrErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

149

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

150

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

153

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

259

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_GeccErrCnt, GeccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

269

(REG_GET_FIELD(ecc_err_cnt, UMCCH0_0_GeccErrCnt, GeccErrCnt) -

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

275

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

276

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

277

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1)

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

292

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

293

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

294

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

295

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

296

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

297

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1))

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

351

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

352

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1) {

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

356

lsb = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, LSB);

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

357

err_addr = REG_GET_FIELD(err_addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr);

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

64

if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

65

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1)

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

81

if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) &&

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

82

(REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

83

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

84

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

85

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UC) == 1 ||

drivers/gpu/drm/amd/amdgpu/umc_v8_7.c

86

REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, TCC) == 1))

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1174

if (REG_GET_FIELD(tmp, SRBM_STATUS, UVD_RQ_PENDING) ||

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1175

REG_GET_FIELD(tmp, SRBM_STATUS, UVD_BUSY) ||

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

2166

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_VCPU_VCODEC_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

2292

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_VCPU_VCODEC_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

2117

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_VCPU_VCODEC_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1686

poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_VCPU_VCODEC_STATUS, POISONED_PF);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

349

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

357

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

430

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

438

if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))

drivers/gpu/drm/amd/amdgpu/vi.c

1390

cnt0_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER0_UPPER);

drivers/gpu/drm/amd/amdgpu/vi.c

1391

cnt1_of = REG_GET_FIELD(tmp, PCIE_PERF_CNTL_TXCLK, COUNTER1_UPPER);

drivers/gpu/drm/amd/amdgpu/vi.c

1420

if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) &&

drivers/gpu/drm/amd/amdgpu/vi.c

555

if (REG_GET_FIELD(tmp, CG_CLKPIN_CNTL_2, MUX_TCLK_TO_XCLK))

drivers/gpu/drm/amd/amdgpu/vi.c

559

if (REG_GET_FIELD(tmp, CG_CLKPIN_CNTL, XTALIN_DIVIDE))

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

103

if (!REG_GET_FIELD(f32_cntl, VPEC_F32_CNTL, HALT)) {

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

124

if (REG_GET_FIELD(reg_data, VPEC_STATUS2, TH0F32_INSTR_PTR)) {

drivers/gpu/drm/amd/amdgpu/vpe_v2_0.c

130

if (REG_GET_FIELD(reg_data, VPEC_STATUS6, TH1F32_INSTR_PTR)) {

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

216

encoding = REG_GET_FIELD(context_id1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

223

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

227

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

231

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

235

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

239

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

243

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

252

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

256

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

260

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

264

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

268

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

272

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

276

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

289

sq_intr_err_type = REG_GET_FIELD(context_id0, KFD_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

294

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

298

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

302

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

306

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

310

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

314

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c

318

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

157

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

159

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, WLT),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

160

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

162

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

164

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

166

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

168

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

170

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

172

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

182

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, DATA),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

183

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

185

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, PRIV),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

186

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

188

REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

190

REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

200

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

202

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

204

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

206

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

208

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

210

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

212

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

377

sq_int_enc = REG_GET_FIELD(context_id1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

385

sq_int_priv = REG_GET_FIELD(context_id0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c

395

sq_int_errtype = REG_GET_FIELD(context_id0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

152

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

153

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, WLT),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

154

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_BUF0_FULL),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

155

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_BUF1_FULL),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

156

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_UTC_ERROR));

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

164

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, DATA),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

165

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, SA_ID),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

166

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, PRIV),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

167

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, WAVE_ID),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

168

REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1, SIMD_ID),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

169

REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1, WGP_ID));

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

177

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, DETAIL),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

178

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, TYPE),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

179

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, SA_ID),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

180

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, PRIV),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

181

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, WAVE_ID),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

182

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1, SIMD_ID),

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

183

REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1, WGP_ID));

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

364

sq_int_enc = REG_GET_FIELD(context_id1,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

372

sq_int_priv = REG_GET_FIELD(context_id0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v12_1.c

382

sq_int_errtype = REG_GET_FIELD(context_id0,

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

385

encoding = REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, ENCODING);

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

391

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

395

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

399

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

403

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

407

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

411

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

415

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

419

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

423

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

427

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

436

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

440

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

444

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

448

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

452

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

456

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

460

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

474

sq_intr_err = REG_GET_FIELD(sq_int_data, KFD_SQ_INT_DATA, ERR_TYPE);

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

478

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

482

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

486

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

490

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

494

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

498

REG_GET_FIELD(

drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

502

REG_GET_FIELD(

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

650

num_pkrs = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

652

num_pipes = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PIPES);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

104

REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_TACH_STATUS),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

132

REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

135

REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL2),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

263

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

74

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

76

duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

124

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

126

duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS),

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

152

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1180

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1_ARCT),

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1237

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1_ARCT),

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1239

duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS_ARCT),

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2950

smu->stb_context.enabled = REG_GET_FIELD(reg, MP1_PMI_3_START, ENABLE);

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2960

smu->stb_context.stb_buf_size = 1 << REG_GET_FIELD(reg, MP1_PMI_3_FIFO, DEPTH);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1109

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1173

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1175

duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS),

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1066

duty100 = REG_GET_FIELD(RREG32_SOC15(THM, 0, regCG_FDO_CTRL1),

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2634

return REG_GET_FIELD(RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL),

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3391

info->hwid = REG_GET_FIELD(ipid, MCMP1_IPIDT0, HardwareID);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3392

info->mcatype = REG_GET_FIELD(ipid, MCMP1_IPIDT0, McaType);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3399

instidhi = REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3400

instid = REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3453

hwid = REG_GET_FIELD(val, MCMP1_IPIDT0, HardwareID);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3454

mcatype = REG_GET_FIELD(val, MCMP1_IPIDT0, McaType);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3480

if (!REG_GET_FIELD(status0, MCMP1_STATUST0, Val)) {

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3539

if (!REG_GET_FIELD(status0, MCMP1_STATUST0, Val)) {

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3545

REG_GET_FIELD(status0, MCMP1_STATUST0, UC) == 1 &&

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3546

REG_GET_FIELD(status0, MCMP1_STATUST0, PCC) == 1) {

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3551

*count = REG_GET_FIELD(misc0, MCMP1_MISC0T0, ErrCnt);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3563

if (!REG_GET_FIELD(status0, MCMP1_STATUST0, Val)) {

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3569

REG_GET_FIELD(status0, MCMP1_STATUST0, UC) == 1 &&

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3570

REG_GET_FIELD(status0, MCMP1_STATUST0, PCC) == 1) {

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3577

*count = REG_GET_FIELD(misc0, MCMP1_MISC0T0, ErrCnt);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3587

instlo = REG_GET_FIELD(entry->regs[MCA_REG_IDX_IPID], MCMP1_IPIDT0, InstanceIdLo);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3607

instlo = REG_GET_FIELD(entry->regs[MCA_REG_IDX_IPID], MCMP1_IPIDT0, InstanceIdLo);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3616

errcode = REG_GET_FIELD(entry->regs[MCA_REG_IDX_STATUS], MCMP1_STATUST0, ErrorCode);

drivers/gpu/drm/amd/ras/rascore/ras_nbio_v7_9.c

112

mem_mode = REG_GET_FIELD(mem_status, BIF_BX_PF0_PARTITION_MEM_STATUS, NPS_MODE);

drivers/gpu/drm/amd/ras/rascore/ras_nbio_v7_9.c

63

if (REG_GET_FIELD(bif_doorbell_intr_cntl,

drivers/gpu/drm/amd/ras/rascore/ras_nbio_v7_9.c

87

if (REG_GET_FIELD(bif_doorbell_intr_cntl,

drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h

276

#define ACA_IPID_2_DIE_ID(ipid) ((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi) >> 2) & 0x03)

drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h

278

(ACA_IPID_LO_2_UMC_CH(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo)))

drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h

281

(ACA_IPID_LO_2_UMC_INST(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo)))

drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h

284

(((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo) & 0x1) << 2) | \

drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h

285

(REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdHi) & 0x03))

drivers/gpu/drm/amd/ras/rascore/ras_umc_v12_0.h

288

REG_GET_FIELD(addr, MCA_UMC_UMC0_MCUMC_ADDRT0, ErrorAddr)