REG_GET_3
REG_GET_3(RDPCSTX_PHY_FUSE0,
REG_GET_3(RDPCSTX_PHY_FUSE1,
REG_GET_3(RDPCSTX_PHY_FUSE2,
REG_GET_3(RDPCSTX_PHY_FUSE3,
regval = REG_GET_3(gpio.MASK_reg,
REG_GET_3(DP_SYM32_ENC_VID_PIXEL_FORMAT,
REG_GET_3(DCN_SURF0_TTU_CNTL0,
REG_GET_3(DCN_SURF1_TTU_CNTL0,
REG_GET_3(DCHUBP_CNTL,
REG_GET_3(DCN_SURF0_TTU_CNTL0,
REG_GET_3(DCN_SURF1_TTU_CNTL0,
REG_GET_3(DCHUBP_CNTL,
REG_GET_3(DCN_SURF0_TTU_CNTL0,
REG_GET_3(DCN_SURF1_TTU_CNTL0,
REG_GET_3(DCN_CUR0_TTU_CNTL0,
REG_GET_3(DCN_SURF0_TTU_CNTL0,
REG_GET_3(DCN_SURF1_TTU_CNTL0,
REG_GET_3(DCN_CUR0_TTU_CNTL0,
REG_GET_3(DCN_SURF0_TTU_CNTL0,
REG_GET_3(DCN_SURF1_TTU_CNTL0,
REG_GET_3(DCHUBP_CNTL,
REG_GET_3(MPCC_STATUS[mpcc_id],
REG_GET_3(MPCC_MCM_3DLUT_FAST_LOAD_STATUS[mpcc_id],
REG_GET_3(MPC_RMCM_3DLUT_FAST_LOAD_STATUS[mpcc_inst], MPC_RMCM_3DLUT_FL_DONE, &s->rmcm_regs.rmcm_3dlut_fl_done,
REG_GET_3(MPC_RMCM_3DLUT_MODE[mpcc_inst], MPC_RMCM_3DLUT_SIZE, &s->rmcm_regs.rmcm_3dlut_size,
REG_GET_3(OPTC_DATA_SOURCE_SELECT,