REG_FPGA0_XA_RF_INT_OE
REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE,
val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE);
rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32);
REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE,
REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE,
val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE);
rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32);
REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE,
REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE,
reg_int_oe = REG_FPGA0_XA_RF_INT_OE;
REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE,
val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE);
rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32);
rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, 0x66f60210);