A_R0
{"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}},
{"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}},
{"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}},
{"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}},
{"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}},
{"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}},
{"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}},
{"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}},
{"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}},
{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}},
{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}},
{"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}},
{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}},
{"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}},
{"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}},
case A_R0:
{"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}},
{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}},