A_PL_CAUSE
reg_block_dump(ap, buf, A_PL_ENABLE, A_PL_CAUSE);
writel(F_PL_INTR_ESPI, espi->adapter->regs + A_PL_CAUSE);
pl_intr = readl(cmac->adapter->regs + A_PL_CAUSE);
writel(pl_intr, cmac->adapter->regs + A_PL_CAUSE);
writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
writel(SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_CAUSE);
u32 cause = readl(adapter->regs + A_PL_CAUSE);
writel(cause, adapter->regs + A_PL_CAUSE);
u32 pl_intr = readl(adapter->regs + A_PL_CAUSE);
adapter->regs + A_PL_CAUSE);
u32 cause = readl(adapter->regs + A_PL_CAUSE);
writel(cause, adapter->regs + A_PL_CAUSE);
readl(adapter->regs + A_PL_CAUSE); /* flush writes */
writel(FPGA_PCIX_INTERRUPT_TP, tp->adapter->regs + A_PL_CAUSE);
writel(F_PL_INTR_TP, tp->adapter->regs + A_PL_CAUSE);