REG_WRITE_WITH_AUX
REG_WRITE_WITH_AUX(map->dpll, temp, i);
REG_WRITE_WITH_AUX(map->dpll,
REG_WRITE_WITH_AUX(map->dpll,
REG_WRITE_WITH_AUX(map->conf,
REG_WRITE_WITH_AUX(map->cntr,
REG_WRITE_WITH_AUX(map->base,
REG_WRITE_WITH_AUX(VGACNTRL, VGA_DISP_DISABLE, i);
REG_WRITE_WITH_AUX(map->cntr,
REG_WRITE_WITH_AUX(map->base,
REG_WRITE_WITH_AUX(map->conf,
REG_WRITE_WITH_AUX(map->dpll,
REG_WRITE_WITH_AUX(VGACNTRL, VGA_DISP_DISABLE, i);
REG_WRITE_WITH_AUX(map->src, ((mode->crtc_hdisplay - 1) << 16) |
REG_WRITE_WITH_AUX(map->htotal, (mode->crtc_hdisplay - 1) |
REG_WRITE_WITH_AUX(map->vtotal, (mode->crtc_vdisplay - 1) |
REG_WRITE_WITH_AUX(map->hblank,
REG_WRITE_WITH_AUX(map->hsync,
REG_WRITE_WITH_AUX(map->vblank,
REG_WRITE_WITH_AUX(map->vsync,
REG_WRITE_WITH_AUX(map->htotal, (adjusted_mode->crtc_hdisplay - 1) |
REG_WRITE_WITH_AUX(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) |
REG_WRITE_WITH_AUX(map->hblank, (adjusted_mode->crtc_hblank_start - 1) |
REG_WRITE_WITH_AUX(map->hsync, (adjusted_mode->crtc_hsync_start - 1) |
REG_WRITE_WITH_AUX(map->vblank, (adjusted_mode->crtc_vblank_start - 1) |
REG_WRITE_WITH_AUX(map->vsync, (adjusted_mode->crtc_vsync_start - 1) |
REG_WRITE_WITH_AUX(map->fp0, fp, i);
REG_WRITE_WITH_AUX(map->dpll, dpll & ~DPLL_VCO_ENABLE, i);
REG_WRITE_WITH_AUX(map->fp0, fp, i);
REG_WRITE_WITH_AUX(map->dpll, dpll, i);
REG_WRITE_WITH_AUX(map->dpll, dpll, i);
REG_WRITE_WITH_AUX(map->conf, pipeconf, i);
REG_WRITE_WITH_AUX(map->cntr, dspcntr, i);
REG_WRITE_WITH_AUX(SDVOB, bval, j);
REG_WRITE_WITH_AUX(SDVOC, cval, j);