REG_CCK0_AFE_SETTING
REG_FPGA0_XB_RF_INT_OE, REG_CCK0_AFE_SETTING
val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);
REG_FPGA0_XB_RF_INT_OE, REG_CCK0_AFE_SETTING
val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);
REG_RFE_CTRL_ANT_SRC2, REG_CCK0_AFE_SETTING
REG_FPGA0_XB_RF_INT_OE, REG_CCK0_AFE_SETTING
val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);
val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);
val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);