drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

148

REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

153

REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_abm.c

171

REG_SET_3(DC_ABM1_HGLS_REG_READ_PROGRESS, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

107

REG_SET_3(DC_I2C_DATA, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

102

REG_SET_3(CUR_COLOR1, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

107

REG_SET_3(CUR_COLOR2, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

187

REG_SET_3(DC_LUT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c

226

REG_SET_3(DEGAMMA_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

190

REG_SET_3(DP_DPHY_SYM0, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

198

REG_SET_3(DP_DPHY_SYM1, 0,

drivers/gpu/drm/amd/display/dc/dce/dce_transform.c

240

REG_SET_3(SCL_COEF_RAM_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c

111

REG_SET_3(DC_ABM1_HGLS_REG_READ_PROGRESS, 0,

drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c

88

REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,

drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c

93

REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c

704

REG_SET_3(WBSCL_COEF_RAM_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c

89

REG_SET_3(MMHUBBUB_WARMUP_CONTROL_STATUS, 0, MMHUBBUB_WARMUP_EN, true,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

146

REG_SET_3(DP_DPHY_SYM0, 0,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

154

REG_SET_3(DP_DPHY_SYM1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

309

REG_SET_3(FORMAT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

315

REG_SET_3(FORMAT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

780

REG_SET_3(FORMAT_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

251

REG_SET_3(SCL_COEF_RAM_TAP_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

636

REG_SET_3(DSCL_AUTOCAL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

1106

REG_SET_3(DSCL_AUTOCAL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

243

REG_SET_3(SCL_COEF_RAM_TAP_SELECT, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

664

REG_SET_3(DSCL_EASF_V_MODE, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

707

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

711

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

715

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

719

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

723

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

727

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG5, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

731

REG_SET_3(DSCL_EASF_V_BF1_PWL_SEG6, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

739

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

743

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

747

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

751

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

755

REG_SET_3(DSCL_EASF_V_BF3_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

779

REG_SET_3(DSCL_EASF_H_MODE, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

812

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

816

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

820

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

824

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

828

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

832

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG5, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

836

REG_SET_3(DSCL_EASF_H_BF1_PWL_SEG6, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

844

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

848

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

852

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

856

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

860

REG_SET_3(DSCL_EASF_H_BF3_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

976

REG_SET_3(ISHARP_NOISE_GAIN_PWL, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

982

REG_SET_3(ISHARP_LBA_PWL_SEG0, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

986

REG_SET_3(ISHARP_LBA_PWL_SEG1, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

990

REG_SET_3(ISHARP_LBA_PWL_SEG2, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

994

REG_SET_3(ISHARP_LBA_PWL_SEG3, 0,

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

998

REG_SET_3(ISHARP_LBA_PWL_SEG4, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

608

REG_SET_3(DSCC_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

632

REG_SET_3(DSCC_PPS_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

666

REG_SET_3(DSCC_PPS_CONFIG6, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c

683

REG_SET_3(DSCC_PPS_CONFIG10, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

222

REG_SET_3(DSCC_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

246

REG_SET_3(DSCC_PPS_CONFIG0, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

280

REG_SET_3(DSCC_PPS_CONFIG6, 0,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

297

REG_SET_3(DSCC_PPS_CONFIG10, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

679

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

684

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

689

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

153

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

158

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

163

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c

700

REG_SET_3(DMDATA_QOS_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

323

REG_SET_3(DCN_SURF0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

328

REG_SET_3(DCN_SURF1_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

333

REG_SET_3(DCN_CUR0_TTU_CNTL0, 0,

drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/dcn32_mmhubbub.c

89

REG_SET_3(MMHUBBUB_WARMUP_CONTROL_STATUS, 0, MMHUBBUB_WARMUP_EN, true,

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

224

REG_SET_3(DPG_RAMP_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

235

REG_SET_3(DPG_RAMP_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.c

246

REG_SET_3(DPG_RAMP_CONTROL, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

584

REG_SET_3(OTG_BLACK_COLOR, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

761

REG_SET_3(OTG_TRIGA_CNTL, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

770

REG_SET_3(OTG_TRIGA_CNTL, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

167

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

208

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

430

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

147

REG_SET_3(OTG_BLANK_DATA_COLOR, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

152

REG_SET_3(OTG_BLANK_DATA_COLOR_EXT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

254

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

94

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

72

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

84

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

79

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

92

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

117

REG_SET_3(OPTC_DATA_SOURCE_SELECT, 0,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

442

REG_SET_3(OTG_VUPDATE_KEEPOUT, 0,