REG_RXPSEL
cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28);
rtw_write8(rtwdev, REG_RXPSEL, 0x00);
rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);
rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x3);
rtw_write32_mask(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST, 0x2);
bb_reg_808 = rtw_read32(rtwdev, REG_RXPSEL);
rtw_write8(rtwdev, REG_RXPSEL, 0x11);
rtw_write32(rtwdev, REG_RXPSEL, bb_reg_808);
rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);
rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);
rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1);
rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0);
cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28);
rtw_write32_clr(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);
rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);
rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0);
rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0,
rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1);
rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0);
rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel);
cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28);
rtw_write8(rtwdev, REG_RXPSEL, 0x00);
rtw_write32_mask(rtwdev, REG_RXPSEL, 0xff, 0x11);
rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);
rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST);