REG_RMW
REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000);
REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000);
REG_RMW(ah, AR_PHY_TPC_11_B0,
REG_RMW(ah, AR_PHY_TPC_11_B1,
REG_RMW(ah, AR_PHY_TPC_11_B2,
REG_RMW(ah, AR_PHY_TPC_6_B0,
REG_RMW(ah, AR_PHY_TPC_6_B1,
REG_RMW(ah, AR_PHY_TPC_6_B2,
REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
REG_RMW(ah, AR_WOW_LENGTH3, set, clr);
REG_RMW(ah, AR_WOW_LENGTH4, set, clr);
REG_RMW(ah, AR_PCIE_PM_CTRL(ah), AR_PMCTRL_WOW_PME_CLR,
REG_RMW(ah, AR_GPIO_PDPU(ah),
REG_RMW(ah, ah->nf_regs[i],
REG_RMW(ah, ah->nf_regs[i],
REG_RMW(ah, reg, ((val << shift) & mask), mask);
REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr);
REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0,
REG_RMW(ah, AR_PHY_TIMING_CTRL4(0),
REG_RMW(ah, AR_PHY_RF_CTL4,
REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW(ah, AR_PHY_RXGAIN + regChainOffset,
REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW(ah, AR_USEC,
REG_RMW(ah, AR_TXSIFS,
REG_RMW(ah, AR_TXCFG, AR_TXCFG_DMASZ_128B, AR_TXCFG_DMASZ_MASK);
REG_RMW(ah, AR_RXCFG, AR_RXCFG_DMASZ_128B, AR_RXCFG_DMASZ_MASK);
REG_RMW(ah, AR_STA_ID1, set, mask);
REG_RMW(ah, AR_STA_ID1, macStaId1
REG_RMW(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB, 0);
REG_RMW(ah, addr, (type << gpio_shift),
REG_RMW(ah, AR7010_GPIO_OE, gpio_set << gpio_shift,
REG_RMW(ah, AR_GPIO_OE_OUT(ah), gpio_set << gpio_shift,
REG_RMW(ah, AR_GPIO_OE_OUT(ah), gpio_set << gpio_shift,
REG_RMW(ah, out_addr, val << gpio, BIT(gpio));
REG_RMW(_a, _r, (((_v) << _f##_S) & _f), (_f))
REG_RMW(_a, _r, (_f), 0)
REG_RMW(_a, _r, 0, (_f))