REG_PINMUX2
VISCONTI_PIN_GROUP(i2c0, REG_PINMUX2, GENMASK(7, 0), 0x00000022),
VISCONTI_PIN_GROUP(i2c1, REG_PINMUX2, GENMASK(15, 8), 0x00002200),
VISCONTI_PIN_GROUP(spi1_cs, REG_PINMUX2, GENMASK(15, 12), 0x00001000),
VISCONTI_PIN_GROUP(spi2_cs, REG_PINMUX2, GENMASK(31, 28), 0x10000000),
VISCONTI_PIN_GROUP(spi1, REG_PINMUX2, GENMASK(11, 0), 0x00000111),
VISCONTI_PIN_GROUP(spi2, REG_PINMUX2, GENMASK(27, 16), 0x01110000),
VISCONTI_PIN_GROUP(uart0, REG_PINMUX2, GENMASK(31, 16), 0x22220000),
VISCONTI_PIN_GROUP(pwm0_gpio4, REG_PINMUX2, GENMASK(19, 16), 0x00050000),
VISCONTI_PIN_GROUP(pwm1_gpio5, REG_PINMUX2, GENMASK(23, 20), 0x00500000),
VISCONTI_PIN_GROUP(pwm2_gpio6, REG_PINMUX2, GENMASK(27, 24), 0x05000000),
VISCONTI_PIN_GROUP(pwm3_gpio7, REG_PINMUX2, GENMASK(31, 28), 0x50000000),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(3, 0)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(7, 4)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(11, 8)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(15, 12)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(19, 16)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(23, 20)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(27, 24)),
tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(31, 28)),