REG_OFDM0_XA_AGC_CORE1
rx_initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32);
val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32);
initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, initial_gain);
u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff;
val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc);
rx_initial_gain_a = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32_mask(priv, REG_OFDM0_XA_AGC_CORE1, 0xff, 0x50);
rtl8xxxu_write32_mask(priv, REG_OFDM0_XA_AGC_CORE1, 0xff,
rx_initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32);
val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32);
val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50);
rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc);
u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff;
rtl8xxxu_write32_mask(priv, REG_OFDM0_XA_AGC_CORE1,