REG_MMU_PT_BASE_ADDR
writel_relaxed(0, bankx->base + REG_MMU_PT_BASE_ADDR);
writel(m4u_dom->cfg.arm_v7s_cfg.ttbr, base + REG_MMU_PT_BASE_ADDR);
writel(dom->cfg.arm_v7s_cfg.ttbr, bank->base + REG_MMU_PT_BASE_ADDR);
writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
writel_relaxed(0, data->base + REG_MMU_PT_BASE_ADDR);
writel_relaxed(data->m4u_dom->pgt_pa, base + REG_MMU_PT_BASE_ADDR);