REG_MCUFW_CTRL
if (rtw_read16(rtwdev, REG_MCUFW_CTRL) == 0xC078) {
tmp = rtw_read32(rtwdev, REG_MCUFW_CTRL);
rtw_write32(rtwdev, REG_MCUFW_CTRL, tmp & (~BIT_BOOT_FSPI_EN));
fw_ctrl = rtw_read8(rtwdev, REG_MCUFW_CTRL);
rtw_write8(rtwdev, REG_MCUFW_CTRL, fw_ctrl);
rtw_write8(rtwdev, REG_MCUFW_CTRL, fw_ctrl);
rtw_write8(rtwdev, REG_MCUFW_CTRL, fw_ctrl);
rtw_write8(rtwdev, REG_MCUFW_CTRL, fw_ctrl);
val = (u16)(rtw_read16(rtwdev, REG_MCUFW_CTRL) & 0x3800);
rtw_write16(rtwdev, REG_MCUFW_CTRL, val);
if (!check_hw_ready(rtwdev, REG_MCUFW_CTRL, FW_READY_MASK, FW_READY)) {
fw_ctrl = rtw_read16(rtwdev, REG_MCUFW_CTRL);
rtw_write16(rtwdev, REG_MCUFW_CTRL, fw_ctrl);
rtw_write8_clr(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
if (rtw_read8(rtwdev, REG_MCUFW_CTRL) & BIT_MCUFWDL_EN)
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
rtw_write32_clr(rtwdev, REG_MCUFW_CTRL, BIT_ROM_DLEN);
rtw_write8_clr(rtwdev, REG_MCUFW_CTRL, BIT_MCUFWDL_EN);
val32 = rtw_read32(rtwdev, REG_MCUFW_CTRL);
rtw_write32(rtwdev, REG_MCUFW_CTRL, val32);
rtw_write8_set(rtwdev, REG_MCUFW_CTRL, BIT_FWDL_CHK_RPT);
if (!check_hw_ready(rtwdev, REG_MCUFW_CTRL, BIT_FWDL_CHK_RPT, 1)) {
val32 = rtw_read32(rtwdev, REG_MCUFW_CTRL);
rtw_write32(rtwdev, REG_MCUFW_CTRL, val32);
val32 = rtw_read32(rtwdev, REG_MCUFW_CTRL);
rtw_read8_mask(rtwdev, REG_MCUFW_CTRL, BIT_RAM_DL_SEL)) {
rtw_write8(rtwdev, REG_MCUFW_CTRL, 0x00);
{REG_MCUFW_CTRL,
if (!(rtw_read8(rtwdev, REG_MCUFW_CTRL) & BIT_RAM_DL_SEL))
rtw_write8(rtwdev, REG_MCUFW_CTRL, 0x00);
if (rtw_read8(rtwdev, REG_MCUFW_CTRL) & BIT_RAM_DL_SEL)
rtw_write8(rtwdev, REG_MCUFW_CTRL, 0);
rtw_write32_mask(rtwdev, REG_MCUFW_CTRL, BIT_ROM_PGE, page);