REG_MASTER_CTRL
AT_READ_REG(hw, REG_MASTER_CTRL, p++);
AT_READ_REG(hw, REG_MASTER_CTRL, &data);
AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl);
AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl);
AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl);
AT_WRITE_REG(hw, REG_MASTER_CTRL,
AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
regs_buff[5] = AT_READ_REG(hw, REG_MASTER_CTRL);
AT_WRITE_REG(hw, REG_MASTER_CTRL,
AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
ioread32(hw->hw_addr + REG_MASTER_CTRL);
(REG_MASTER_CTRL + 2));
val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |
regs_buff[5] = ATL2_READ_REG(hw, REG_MASTER_CTRL);
ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);
val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,