arch/riscv/include/asm/insn.h

401

(SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

60

data = dither_depth_map[cfg->c0_bitdepth] & REG_MASK(2);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

61

data |= (dither_depth_map[cfg->c1_bitdepth] & REG_MASK(2)) << 2;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

62

data |= (dither_depth_map[cfg->c2_bitdepth] & REG_MASK(2)) << 4;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

63

data |= (dither_depth_map[cfg->c3_bitdepth] & REG_MASK(2)) << 6;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

69

data = (cfg->matrix[i] & REG_MASK(4)) |

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

70

((cfg->matrix[i + 1] & REG_MASK(4)) << 4) |

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

71

((cfg->matrix[i + 2] & REG_MASK(4)) << 8) |

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c

72

((cfg->matrix[i + 3] & REG_MASK(4)) << 12);

drivers/media/dvb-frontends/rtl2832.c

155

mask = REG_MASK(msb - lsb);

drivers/media/dvb-frontends/rtl2832.c

185

mask = REG_MASK(msb - lsb);

drivers/net/dsa/ocelot/seville_vsc9953.c

897

ocelot->map[GCB][GCB_MIIM_MII_STATUS & REG_MASK],

drivers/net/ethernet/mscc/ocelot.h

83

*addr = ocelot->map[*target][reg & REG_MASK];

drivers/net/ethernet/mscc/ocelot_io.c

131

regfield.reg = ocelot->map[target][reg & REG_MASK];

drivers/net/ethernet/mscc/ocelot_io.c

74

regmap_read(port->target, ocelot->map[target][reg & REG_MASK], &val);

drivers/net/ethernet/mscc/ocelot_io.c

86

regmap_write(port->target, ocelot->map[target][reg & REG_MASK], val);

drivers/net/ethernet/mscc/ocelot_stats.c

929

WARN(ocelot->map[SYS][last & REG_MASK] >= ocelot->map[SYS][layout[i].reg & REG_MASK],

drivers/net/ethernet/mscc/ocelot_stats.c

931

last, ocelot->map[SYS][last & REG_MASK],

drivers/net/ethernet/mscc/ocelot_stats.c

932

layout[i].reg, ocelot->map[SYS][layout[i].reg & REG_MASK]);

drivers/net/ethernet/mscc/ocelot_stats.c

935

if (region && ocelot->map[SYS][layout[i].reg & REG_MASK] ==

drivers/net/ethernet/mscc/ocelot_stats.c

936

ocelot->map[SYS][last & REG_MASK] + 4) {

drivers/soc/ti/knav_dma.c

301

v = ~DMA_ENABLE & REG_MASK;

include/soc/mscc/ocelot.h

105

#define REG(reg, offset) [reg & REG_MASK] = offset

include/sound/emu10k1.h

64

#define REG_VAL_GET(r, v) ((v & REG_MASK(r)) >> REG_SHIFT(r))

tools/testing/selftests/kvm/arm64/get-reg-list.c

137

__u64 core_off = id & ~REG_MASK, idx;

tools/testing/selftests/kvm/arm64/get-reg-list.c

185

sve_off = id & ~(REG_MASK | ((1ULL << 5) - 1));

tools/testing/selftests/kvm/arm64/get-reg-list.c

258

TEST_ASSERT(!(id & ~(REG_MASK | KVM_REG_ARM_DEMUX_ID_MASK | KVM_REG_ARM_DEMUX_VAL_MASK)),

tools/testing/selftests/kvm/riscv/get-reg-list.c

256

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CONFIG);

tools/testing/selftests/kvm/riscv/get-reg-list.c

285

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CORE);

tools/testing/selftests/kvm/riscv/get-reg-list.c

33

switch (reg & ~REG_MASK) {

tools/testing/selftests/kvm/riscv/get-reg-list.c

397

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_CSR);

tools/testing/selftests/kvm/riscv/get-reg-list.c

419

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_TIMER);

tools/testing/selftests/kvm/riscv/get-reg-list.c

440

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_F);

tools/testing/selftests/kvm/riscv/get-reg-list.c

458

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_D);

tools/testing/selftests/kvm/riscv/get-reg-list.c

476

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_VECTOR);

tools/testing/selftests/kvm/riscv/get-reg-list.c

613

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_ISA_EXT);

tools/testing/selftests/kvm/riscv/get-reg-list.c

679

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_SBI_EXT);

tools/testing/selftests/kvm/riscv/get-reg-list.c

721

__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_SBI_STATE);

tools/testing/selftests/kvm/riscv/get-reg-list.c

760

(id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id & ~REG_MASK);

tools/testing/selftests/kvm/riscv/get-reg-list.c

807

reg_size, id & ~REG_MASK);