REG_HIMRE
rtl_write_dword(rtlpriv, REG_HIMRE,
rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED);
.maps[MAC_HIMRE] = REG_HIMRE,
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
.maps[MAC_HIMRE] = REG_HIMRE,
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED);
.maps[MAC_HIMRE] = REG_HIMRE,
.maps[MAC_HIMRE] = REG_HIMRE,
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED);
.maps[MAC_HIMRE] = REG_HIMRE,
rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMRE, IMR_DISABLED);
.maps[MAC_HIMRE] = REG_HIMRE,