REG_HIMR
rtl8xxxu_write32(priv, REG_HIMR, 0xffffffff);
rtl_write_dword(rtlpriv, REG_HIMR,
rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED);
.maps[MAC_HIMR] = REG_HIMR,
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
.maps[MAC_HIMR] = REG_HIMR,
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
rtl_write_dword(rtlpriv, REG_HIMR, 0xffffffff);
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED);
.maps[MAC_HIMR] = REG_HIMR,
.maps[MAC_HIMR] = REG_HIMR,
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED);
.maps[MAC_HIMR] = REG_HIMR,
rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF);
rtl_write_dword(rtlpriv, REG_HIMR, IMR_DISABLED);
.maps[MAC_HIMR] = REG_HIMR,
rtw_write32(padapter, REG_HIMR, 0);