REG_GPIO_H_PU
PINCTRL_CONF_DESC(45, REG_GPIO_H_PU, BIT(0)),
PINCTRL_CONF_DESC(46, REG_GPIO_H_PU, BIT(1)),
PINCTRL_CONF_DESC(47, REG_GPIO_H_PU, BIT(2)),
PINCTRL_CONF_DESC(48, REG_GPIO_H_PU, BIT(3)),
PINCTRL_CONF_DESC(49, REG_GPIO_H_PU, BIT(4)),
PINCTRL_CONF_DESC(50, REG_GPIO_H_PU, BIT(5)),
PINCTRL_CONF_DESC(51, REG_GPIO_H_PU, BIT(6)),
PINCTRL_CONF_DESC(52, REG_GPIO_H_PU, BIT(7)),
PINCTRL_CONF_DESC(53, REG_GPIO_H_PU, BIT(8)),
PINCTRL_CONF_DESC(54, REG_GPIO_H_PU, BIT(9)),
PINCTRL_CONF_DESC(55, REG_GPIO_H_PU, BIT(10)),
PINCTRL_CONF_DESC(56, REG_GPIO_H_PU, BIT(11)),
PINCTRL_CONF_DESC(57, REG_GPIO_H_PU, BIT(12)),
PINCTRL_CONF_DESC(58, REG_GPIO_H_PU, BIT(13)),
PINCTRL_CONF_DESC(59, REG_GPIO_H_PU, BIT(14)),
PINCTRL_CONF_DESC(34, REG_GPIO_H_PU, BIT(0)),
PINCTRL_CONF_DESC(35, REG_GPIO_H_PU, BIT(1)),
PINCTRL_CONF_DESC(36, REG_GPIO_H_PU, BIT(2)),
PINCTRL_CONF_DESC(37, REG_GPIO_H_PU, BIT(3)),
PINCTRL_CONF_DESC(38, REG_GPIO_H_PU, BIT(4)),
PINCTRL_CONF_DESC(39, REG_GPIO_H_PU, BIT(5)),
PINCTRL_CONF_DESC(40, REG_GPIO_H_PU, BIT(6)),