REG_CONTROLLER_ENABLE
ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
return ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE;
ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
if (!ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE, CONTROLLER_ENABLE,
ufs_renesas_write(hba, REG_CONTROLLER_ENABLE, 0x00000001);
val = ufshcd_readl(hba, REG_CONTROLLER_ENABLE);
ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
u32 hce = ufshcd_readl(hba, REG_CONTROLLER_ENABLE);
ufshcd_writel(hba, hce, REG_CONTROLLER_ENABLE);