RCR
ravb_write(ndev, 0x60000000, RCR);
RCR_EFFS | RCR_ENCF | RCR_ETS0 | RCR_ESF | 0x18000000, RCR);
#define SMC_DELAY() { inw( ioaddr + RCR );\
inw( ioaddr + RCR );\
inw( ioaddr + RCR ); }
BYTE_REG_BITS_ON(rx_mode, ®s->RCR);
volatile u8 RCR;
set_registers(dev, RCR, 1, &rcr);
async_set_registers(dev, RCR, sizeof(rx_creg), rx_creg);
tmpu4b = rtl_read_dword(rtlpriv, RCR);
rtl_write_dword(rtlpriv, RCR, (tmpu4b | RCR_APPFCS |
rtl_write_dword(rtlpriv, RCR, ((u32 *) (val))[0]);
rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);
rtlpci->receive_config = rtl_read_dword(rtlpriv, RCR);
rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);
spi_readl(as, TCR), spi_readl(as, RCR));
spi_writel(as, RCR, 0);
spi_writel(as, RCR, len);
i2s_write_reg(dev->i2s_base, RCR(ch_reg),
kmb_i2s->i2s_base + RCR(ch_reg));