REG_CLK_CLKDIV0
hws[AXICLK_MUX] = ma35d1_clk_mux(dev, "axiclk_mux", clk_base + REG_CLK_CLKDIV0,
clk_base + REG_CLK_CLKDIV0,
clk_base + REG_CLK_CLKDIV0,
clk_base + REG_CLK_CLKDIV0,
clk_base + REG_CLK_CLKDIV0,
clk_base + REG_CLK_CLKDIV0,