REG_CCK0_FAREPORT
cck_n_rx = (rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_2RX) &&
rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_MRC)) ? 2 : 1;
rtw_write32_clr(rtwdev, REG_CCK0_FAREPORT, BIT(15));
rtw_write32_set(rtwdev, REG_CCK0_FAREPORT, BIT(15));
rtw_write32_clr(rtwdev, REG_CCK0_FAREPORT,
cck_n_rx = (rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_2RX) &&
rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_MRC)) ? 2 : 1;
rtw_write32_mask(rtwdev, REG_CCK0_FAREPORT, BIT(18) | BIT(22), 0);
rtw_write32_clr(rtwdev, REG_CCK0_FAREPORT, BIT(15));
rtw_write32_set(rtwdev, REG_CCK0_FAREPORT, BIT(15));