REG_BUS_WIDTH
u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) &
writel_relaxed(bus_width, ad->base + REG_BUS_WIDTH(adchan->no));
writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)