arch/mips/n64/init.c

57

__raw_writel(value, REG_BASE + reg);

drivers/atm/eni.c

1748

eni_dev->reg = base+REG_BASE;

drivers/atm/iphase.c

2382

iadev->reg = base + REG_BASE;

drivers/pinctrl/qcom/pinctrl-msm8976.c

34

.ctl_reg = REG_BASE + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8976.c

35

.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8976.c

36

.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8976.c

37

.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8976.c

38

.intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

32

.ctl_reg = REG_BASE + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

33

.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

34

.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

35

.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-msm8996.c

36

.intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

34

.ctl_reg = REG_BASE + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

35

.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

36

.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

37

.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

38

.intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-qdu1000.c

60

.ctl_reg = REG_BASE + ctl, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

33

.ctl_reg = REG_BASE + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

34

.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

35

.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

36

.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sa8775p.c

37

.intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

32

.ctl_reg = REG_BASE + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

33

.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

34

.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

35

.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx65.c

36

.intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

18

.ctl_reg = REG_BASE + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

19

.io_reg = REG_BASE + 0x4 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

20

.intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

21

.intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \

drivers/pinctrl/qcom/pinctrl-sdx75.c

22

.intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \